176379e0c8
Port the translation of five dialects that define LLVM IR intrinsics (LLVMAVX512, LLVMArmNeon, LLVMArmSVE, NVVM, ROCDL) to the new dialect interface-based mechanism. This allows us to remove individual translations that were created for each of these dialects and just use one common MLIR-to-LLVM-IR translation that potentially supports all dialects instead, based on what is registered and including any combination of translatable dialects. This removal was one of the main goals of the refactoring. To support the addition of GPU-related metadata, the translation interface is extended with the `amendOperation` function that allows the interface implementation to post-process any translated operation with dialect attributes from the dialect for which the interface is implemented regardless of the operation's dialect. This is currently applied to "kernel" functions, but can be used to construct other metadata in dialect-specific ways without necessarily affecting operations. Depends On D96591, D96504 Reviewed By: nicolasvasilache Differential Revision: https://reviews.llvm.org/D96592
63 lines
2.2 KiB
C++
63 lines
2.2 KiB
C++
//===- TestConvertGPUKernelToHsaco.cpp - Test gpu kernel hsaco lowering ---===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Conversion/GPUCommon/GPUCommonPass.h"
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#include "mlir/Dialect/LLVMIR/ROCDLDialect.h"
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#include "mlir/Pass/Pass.h"
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#include "mlir/Pass/PassManager.h"
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#include "mlir/Target/LLVMIR.h"
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#include "mlir/Target/LLVMIR/Dialect/ROCDL/ROCDLToLLVMIRTranslation.h"
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#include "llvm/Support/TargetSelect.h"
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using namespace mlir;
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#if MLIR_ROCM_CONVERSIONS_ENABLED
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static OwnedBlob compileIsaToHsacoForTesting(const std::string &, Location,
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StringRef) {
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const char data[] = "HSACO";
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return std::make_unique<std::vector<char>>(data, data + sizeof(data) - 1);
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}
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static void registerROCDLDialectTranslation(MLIRContext &context) {
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DialectRegistry registry;
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registry.insert<ROCDL::ROCDLDialect>();
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registry.addDialectInterface<ROCDL::ROCDLDialect,
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ROCDLDialectLLVMIRTranslationInterface>();
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context.appendDialectRegistry(registry);
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}
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static std::unique_ptr<llvm::Module>
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translateModuleToROCDL(Operation *m, llvm::LLVMContext &llvmContext,
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StringRef moduleName) {
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registerLLVMDialectTranslation(*m->getContext());
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registerROCDLDialectTranslation(*m->getContext());
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return translateModuleToLLVMIR(m, llvmContext, moduleName);
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}
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namespace mlir {
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namespace test {
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void registerTestConvertGPUKernelToHsacoPass() {
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PassPipelineRegistration<>(
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"test-kernel-to-hsaco",
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"Convert all kernel functions to ROCm hsaco blobs",
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[](OpPassManager &pm) {
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// Initialize LLVM AMDGPU backend.
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LLVMInitializeAMDGPUTarget();
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LLVMInitializeAMDGPUTargetInfo();
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LLVMInitializeAMDGPUTargetMC();
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LLVMInitializeAMDGPUAsmPrinter();
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pm.addPass(createConvertGPUKernelToBlobPass(
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translateModuleToROCDL, compileIsaToHsacoForTesting,
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"amdgcn-amd-amdhsa", "gfx900", "-code-object-v3", "rocdl.hsaco"));
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});
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}
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} // namespace test
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} // namespace mlir
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#endif
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