392 lines
12 KiB
C++
392 lines
12 KiB
C++
//===--- AMDGPU.h - Declare AMDGPU target feature support -------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares AMDGPU TargetInfo objects.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_AMDGPU_H
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#define LLVM_CLANG_LIB_BASIC_TARGETS_AMDGPU_H
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#include "clang/Basic/TargetInfo.h"
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#include "clang/Basic/TargetOptions.h"
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#include "llvm/ADT/StringSet.h"
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#include "llvm/ADT/Triple.h"
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#include "llvm/Support/Compiler.h"
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namespace clang {
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namespace targets {
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class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo {
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static const Builtin::Info BuiltinInfo[];
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static const char *const GCCRegNames[];
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struct LLVM_LIBRARY_VISIBILITY AddrSpace {
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unsigned Generic, Global, Local, Constant, Private;
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AddrSpace(bool IsGenericZero_ = false) {
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if (IsGenericZero_) {
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Generic = 0;
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Global = 1;
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Local = 3;
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Constant = 2;
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Private = 5;
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} else {
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Generic = 4;
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Global = 1;
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Local = 3;
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Constant = 2;
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Private = 0;
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}
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}
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};
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/// \brief The GPU profiles supported by the AMDGPU target.
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enum GPUKind {
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GK_NONE,
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GK_R600,
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GK_R600_DOUBLE_OPS,
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GK_R700,
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GK_R700_DOUBLE_OPS,
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GK_EVERGREEN,
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GK_EVERGREEN_DOUBLE_OPS,
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GK_NORTHERN_ISLANDS,
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GK_CAYMAN,
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GK_GFX6,
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GK_GFX7,
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GK_GFX8,
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GK_GFX9
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};
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struct GPUInfo {
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llvm::StringLiteral Name;
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llvm::StringLiteral CanonicalName;
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AMDGPUTargetInfo::GPUKind Kind;
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};
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GPUInfo GPU;
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static constexpr GPUInfo InvalidGPU = {{""}, {""}, GK_NONE};
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static constexpr GPUInfo R600Names[26] = {
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{{"r600"}, {"r600"}, GK_R600},
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{{"rv630"}, {"r600"}, GK_R600},
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{{"rv635"}, {"r600"}, GK_R600},
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{{"r630"}, {"r630"}, GK_R600},
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{{"rs780"}, {"rs880"}, GK_R600},
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{{"rs880"}, {"rs880"}, GK_R600},
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{{"rv610"}, {"rs880"}, GK_R600},
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{{"rv620"}, {"rs880"}, GK_R600},
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{{"rv670"}, {"rv670"}, GK_R600_DOUBLE_OPS},
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{{"rv710"}, {"rv710"}, GK_R700},
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{{"rv730"}, {"rv730"}, GK_R700},
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{{"rv740"}, {"rv770"}, GK_R700_DOUBLE_OPS},
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{{"rv770"}, {"rv770"}, GK_R700_DOUBLE_OPS},
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{{"cedar"}, {"cedar"}, GK_EVERGREEN},
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{{"palm"}, {"cedar"}, GK_EVERGREEN},
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{{"cypress"}, {"cypress"}, GK_EVERGREEN_DOUBLE_OPS},
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{{"hemlock"}, {"cypress"}, GK_EVERGREEN_DOUBLE_OPS},
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{{"juniper"}, {"juniper"}, GK_EVERGREEN},
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{{"redwood"}, {"redwood"}, GK_EVERGREEN},
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{{"sumo"}, {"sumo"}, GK_EVERGREEN},
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{{"sumo2"}, {"sumo"}, GK_EVERGREEN},
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{{"barts"}, {"barts"}, GK_NORTHERN_ISLANDS},
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{{"caicos"}, {"caicos"}, GK_NORTHERN_ISLANDS},
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{{"turks"}, {"turks"}, GK_NORTHERN_ISLANDS},
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{{"aruba"}, {"cayman"}, GK_CAYMAN},
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{{"cayman"}, {"cayman"}, GK_CAYMAN},
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};
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static constexpr GPUInfo AMDGCNNames[30] = {
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{{"gfx600"}, {"gfx600"}, GK_GFX6},
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{{"tahiti"}, {"gfx600"}, GK_GFX6},
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{{"gfx601"}, {"gfx601"}, GK_GFX6},
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{{"hainan"}, {"gfx601"}, GK_GFX6},
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{{"oland"}, {"gfx601"}, GK_GFX6},
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{{"pitcairn"}, {"gfx601"}, GK_GFX6},
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{{"verde"}, {"gfx601"}, GK_GFX6},
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{{"gfx700"}, {"gfx700"}, GK_GFX7},
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{{"kaveri"}, {"gfx700"}, GK_GFX7},
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{{"gfx701"}, {"gfx701"}, GK_GFX7},
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{{"hawaii"}, {"gfx701"}, GK_GFX7},
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{{"gfx702"}, {"gfx702"}, GK_GFX7},
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{{"gfx703"}, {"gfx703"}, GK_GFX7},
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{{"kabini"}, {"gfx703"}, GK_GFX7},
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{{"mullins"}, {"gfx703"}, GK_GFX7},
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{{"gfx704"}, {"gfx704"}, GK_GFX7},
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{{"bonaire"}, {"gfx704"}, GK_GFX7},
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{{"gfx801"}, {"gfx801"}, GK_GFX8},
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{{"carrizo"}, {"gfx801"}, GK_GFX8},
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{{"gfx802"}, {"gfx802"}, GK_GFX8},
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{{"iceland"}, {"gfx802"}, GK_GFX8},
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{{"tonga"}, {"gfx802"}, GK_GFX8},
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{{"gfx803"}, {"gfx803"}, GK_GFX8},
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{{"fiji"}, {"gfx803"}, GK_GFX8},
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{{"polaris10"}, {"gfx803"}, GK_GFX8},
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{{"polaris11"}, {"gfx803"}, GK_GFX8},
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{{"gfx810"}, {"gfx810"}, GK_GFX8},
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{{"stoney"}, {"gfx810"}, GK_GFX8},
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{{"gfx900"}, {"gfx900"}, GK_GFX9},
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{{"gfx902"}, {"gfx902"}, GK_GFX9},
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};
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bool hasFP64 : 1;
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bool hasFMAF : 1;
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bool hasLDEXPF : 1;
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const AddrSpace AS;
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static bool hasFullSpeedFMAF32(StringRef GPUName) {
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return parseAMDGCNName(GPUName).Kind >= GK_GFX9;
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}
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static bool isAMDGCN(const llvm::Triple &TT) {
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return TT.getArch() == llvm::Triple::amdgcn;
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}
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static bool isGenericZero(const llvm::Triple &TT) { return true; }
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public:
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AMDGPUTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts);
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void setAddressSpaceMap(bool DefaultIsPrivate);
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void adjust(LangOptions &Opts) override;
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uint64_t getPointerWidthV(unsigned AddrSpace) const override {
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if (GPU.Kind <= GK_CAYMAN)
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return 32;
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if (AddrSpace == AS.Private || AddrSpace == AS.Local) {
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return 32;
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}
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return 64;
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}
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uint64_t getPointerAlignV(unsigned AddrSpace) const override {
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return getPointerWidthV(AddrSpace);
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}
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uint64_t getMaxPointerWidth() const override {
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return getTriple().getArch() == llvm::Triple::amdgcn ? 64 : 32;
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}
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const char *getClobbers() const override { return ""; }
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ArrayRef<const char *> getGCCRegNames() const override;
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ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
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return None;
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}
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/// Accepted register names: (n, m is unsigned integer, n < m)
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/// v
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/// s
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/// {vn}, {v[n]}
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/// {sn}, {s[n]}
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/// {S} , where S is a special register name
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////{v[n:m]}
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/// {s[n:m]}
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bool validateAsmConstraint(const char *&Name,
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TargetInfo::ConstraintInfo &Info) const override {
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static const ::llvm::StringSet<> SpecialRegs({
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"exec", "vcc", "flat_scratch", "m0", "scc", "tba", "tma",
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"flat_scratch_lo", "flat_scratch_hi", "vcc_lo", "vcc_hi", "exec_lo",
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"exec_hi", "tma_lo", "tma_hi", "tba_lo", "tba_hi",
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});
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StringRef S(Name);
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bool HasLeftParen = false;
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if (S.front() == '{') {
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HasLeftParen = true;
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S = S.drop_front();
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}
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if (S.empty())
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return false;
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if (S.front() != 'v' && S.front() != 's') {
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if (!HasLeftParen)
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return false;
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auto E = S.find('}');
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if (!SpecialRegs.count(S.substr(0, E)))
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return false;
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S = S.drop_front(E + 1);
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if (!S.empty())
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return false;
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// Found {S} where S is a special register.
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Info.setAllowsRegister();
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Name = S.data() - 1;
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return true;
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}
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S = S.drop_front();
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if (!HasLeftParen) {
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if (!S.empty())
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return false;
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// Found s or v.
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Info.setAllowsRegister();
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Name = S.data() - 1;
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return true;
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}
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bool HasLeftBracket = false;
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if (!S.empty() && S.front() == '[') {
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HasLeftBracket = true;
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S = S.drop_front();
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}
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unsigned long long N;
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if (S.empty() || consumeUnsignedInteger(S, 10, N))
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return false;
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if (!S.empty() && S.front() == ':') {
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if (!HasLeftBracket)
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return false;
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S = S.drop_front();
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unsigned long long M;
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if (consumeUnsignedInteger(S, 10, M) || N >= M)
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return false;
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}
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if (HasLeftBracket) {
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if (S.empty() || S.front() != ']')
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return false;
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S = S.drop_front();
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}
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if (S.empty() || S.front() != '}')
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return false;
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S = S.drop_front();
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if (!S.empty())
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return false;
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// Found {vn}, {sn}, {v[n]}, {s[n]}, {v[n:m]}, or {s[n:m]}.
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Info.setAllowsRegister();
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Name = S.data() - 1;
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return true;
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}
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bool
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initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
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StringRef CPU,
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const std::vector<std::string> &FeatureVec) const override;
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void adjustTargetOptions(const CodeGenOptions &CGOpts,
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TargetOptions &TargetOpts) const override;
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ArrayRef<Builtin::Info> getTargetBuiltins() const override;
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void getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const override;
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BuiltinVaListKind getBuiltinVaListKind() const override {
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return TargetInfo::CharPtrBuiltinVaList;
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}
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static GPUInfo parseR600Name(StringRef Name);
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static GPUInfo parseAMDGCNName(StringRef Name);
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bool isValidCPUName(StringRef Name) const override {
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if (getTriple().getArch() == llvm::Triple::amdgcn)
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return GK_NONE != parseAMDGCNName(Name).Kind;
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else
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return GK_NONE != parseR600Name(Name).Kind;
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}
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void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
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bool setCPU(const std::string &Name) override {
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if (getTriple().getArch() == llvm::Triple::amdgcn)
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GPU = parseAMDGCNName(Name);
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else
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GPU = parseR600Name(Name);
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return GPU.Kind != GK_NONE;
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}
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void setSupportedOpenCLOpts() override {
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auto &Opts = getSupportedOpenCLOpts();
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Opts.support("cl_clang_storage_class_specifiers");
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Opts.support("cl_khr_icd");
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if (hasFP64)
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Opts.support("cl_khr_fp64");
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if (GPU.Kind >= GK_EVERGREEN) {
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Opts.support("cl_khr_byte_addressable_store");
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Opts.support("cl_khr_global_int32_base_atomics");
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Opts.support("cl_khr_global_int32_extended_atomics");
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Opts.support("cl_khr_local_int32_base_atomics");
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Opts.support("cl_khr_local_int32_extended_atomics");
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}
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if (GPU.Kind >= GK_GFX6) {
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Opts.support("cl_khr_fp16");
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Opts.support("cl_khr_int64_base_atomics");
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Opts.support("cl_khr_int64_extended_atomics");
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Opts.support("cl_khr_mipmap_image");
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Opts.support("cl_khr_subgroups");
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Opts.support("cl_khr_3d_image_writes");
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Opts.support("cl_amd_media_ops");
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Opts.support("cl_amd_media_ops2");
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}
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}
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LangAS getOpenCLTypeAddrSpace(OpenCLTypeKind TK) const override {
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switch (TK) {
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case OCLTK_Image:
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return LangAS::opencl_constant;
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case OCLTK_ClkEvent:
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case OCLTK_Queue:
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case OCLTK_ReserveID:
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return LangAS::opencl_global;
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default:
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return TargetInfo::getOpenCLTypeAddrSpace(TK);
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}
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}
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llvm::Optional<LangAS> getConstantAddressSpace() const override {
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return getLangASFromTargetAS(AS.Constant);
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}
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/// \returns Target specific vtbl ptr address space.
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unsigned getVtblPtrAddressSpace() const override { return AS.Constant; }
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/// \returns If a target requires an address within a target specific address
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/// space \p AddressSpace to be converted in order to be used, then return the
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/// corresponding target specific DWARF address space.
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///
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/// \returns Otherwise return None and no conversion will be emitted in the
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/// DWARF.
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Optional<unsigned>
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getDWARFAddressSpace(unsigned AddressSpace) const override {
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const unsigned DWARF_Private = 1;
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const unsigned DWARF_Local = 2;
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if (AddressSpace == AS.Private) {
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return DWARF_Private;
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} else if (AddressSpace == AS.Local) {
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return DWARF_Local;
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} else {
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return None;
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}
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}
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CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
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switch (CC) {
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default:
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return CCCR_Warning;
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case CC_C:
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case CC_OpenCLKernel:
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return CCCR_OK;
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}
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}
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// In amdgcn target the null pointer in global, constant, and generic
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// address space has value 0 but in private and local address space has
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// value ~0.
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uint64_t getNullPointerValue(LangAS AS) const override {
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return AS == LangAS::opencl_local ? ~0 : 0;
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}
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};
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} // namespace targets
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} // namespace clang
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#endif // LLVM_CLANG_LIB_BASIC_TARGETS_AMDGPU_H
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