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Code Issues Pull Requests Actions 6 Packages Projects Releases Wiki Activity
llvm-project/llvm/test/Transforms/CodeGenPrepare
History
Arthur Eubanks 19d4f5e649 [test] Add missing REQUIRES: arm-registered-target
2022-07-20 10:59:07 -07:00
..
AArch64
[AArch64] Add support for FMA intrinsics to shouldSinkOperands.
2022-05-27 10:37:03 +01:00
AMDGPU
…
ARM
[CodeGenPrepare] The instruction to be sunk should be inserted before its user in a block
2021-08-17 18:58:15 +08:00
Mips
…
NVPTX
Don't sink ptrtoint/inttoptr sequences into non-noop addrspacecasts.
2022-07-16 10:56:42 -04:00
PowerPC
…
RISCV
[CodeGenPrepare] Avoid a scalable-vector crash in ctlz/cttz
2021-10-20 16:45:55 +01:00
SPARC
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X86
[CGP] Also freeze ctlz/cttz operand when despeculating
2022-06-10 09:46:10 +02:00
dead-allocation.ll
[test] Add missing REQUIRES: arm-registered-target
2022-07-20 10:59:07 -07:00
dom-tree.ll
[test] Test domtree validity with -verify-dom-info instead of -analyze
2022-02-09 16:00:18 -08:00
sink-shift-and-trunc.ll
…
skip-merging-case-block.ll
…
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