Simon Pilgrim dbcbaee7fd [X86][3DNow!] Add PFRCP reg-reg disassembler test case (PR21168) ...

llvm-svn: 325435

2018-02-17 14:58:16 +00:00

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amd3dnow.txt

[X86][3DNow!] Add PFRCP reg-reg disassembler test case (PR21168)

2018-02-17 14:58:16 +00:00

avx-512.txt

[X86] Fix disassembly of EVEX rounding control and SAE instructions.

2017-10-23 02:26:24 +00:00

fp-stack.txt

[X86] Run dos2unix on two disassembler tests.

2017-10-02 21:46:58 +00:00

gather-novsib.txt

[X86] Don't allow gather/scatter to disassembler if memory operand does not use a SIB byte.

2017-10-22 04:32:30 +00:00

hex-immediates.txt

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intel-syntax-32.txt

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intel-syntax.txt

AVX512F: Add GATHER/SCATTER assembler Intel syntax tests for knl/skx/avx . Change memory operand parser handling.

2016-02-25 13:30:17 +00:00

invalid-VEX-vvvv.txt

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lit.local.cfg

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marked-up.txt

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missing-sib.txt

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moffs.txt

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padlock.txt

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prefixes-i386.txt

Fix for Bug 34475 - LOCK/REP/REPNE prefixes emitted as instruction on their own.

2017-11-03 15:25:13 +00:00

prefixes-x86_64.txt

Fix for Bug 34475 - LOCK/REP/REPNE prefixes emitted as instruction on their own.

2017-11-03 15:25:13 +00:00

prefixes.txt

[MC][X86] Add test case from PR19251

2017-11-18 23:23:25 +00:00

simple-tests.txt

[X86] Add 'l' and 'q' suffixes to the tbm instruction mnemonics.

2018-01-12 06:21:36 +00:00

truncated-input.txt

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x86-16.txt

[X86] Don't swap argument on BOUND instruction in at&t syntax.

2018-02-14 21:54:58 +00:00

x86-32.txt

[X86] Add prefetchwt1 instruction and overhaul priorities and isel enabling for prefetch instructions.

2017-12-22 02:30:30 +00:00

x86-64-err.txt

[X86] Teach the disassembler that some instructions use VEX.W==0 without a corresponding VEX.W==1 instruction and we shouldn't treat them as if VEX.W is ignored.

2017-10-22 06:18:26 +00:00

x86-64.txt

[X86] Stop printing moves between VR64 and GR64 with 'movd' mnemonic. Use 'movq' instead.

2018-01-05 20:55:12 +00:00