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llvm-project/llvm/test/MC/RISCV
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Shiva Chen 7c17242b92 [RISCV] Implement c.lui immediate operand constraint 
Implement c.lui immediate constraint to [1, 31] and [0xfffe0, 0xfffff].
The RISC-V ISA describes the constraint as [1, 63], with that value
being loaded in to bits 17-12 of the destination register and sign extended
from bit 17. Therefore, this 6-bit immediate can represent values in the
ranges [1, 31] and [0xfffe0, 0xfffff].

Differential Revision: https://reviews.llvm.org/D42834

llvm-svn: 325792
2018-02-22 15:02:28 +00:00
..
cnop.s
[RISCV] Add ELFObjectFileBase::getRISCVFeatures let llvm-objdump could get RISCV target feature
2018-02-02 06:01:02 +00:00
csr-aliases.s
[RISCV] Pass MCSubtargetInfo to print methods.
2018-01-12 02:27:00 +00:00
elf-flags.s
[RISCV] Encode RISCV specific ELF e_flags to RISCV Binary by RISCVTargetStreamer
2018-01-26 07:53:07 +00:00
elf-header.s
[RISCV] Bugfix createRISCVELFObjectWriter
2017-10-18 16:11:31 +00:00
fixups-compressed.s
[RISCV] Add ELFObjectFileBase::getRISCVFeatures let llvm-objdump could get RISCV target feature
2018-02-02 06:01:02 +00:00
fixups-diagnostics.s
[RISCV] Add common fixups and relocations
2017-09-28 08:26:24 +00:00
fixups.s
[RISCV] Enable emission of alias instructions by default
2017-12-15 09:47:01 +00:00
hilo-constaddr.s
[RISCV] Add common fixups and relocations
2017-09-28 08:26:24 +00:00
lit.local.cfg
…
priv-invalid.s
[RISCV] Define sfence.vma InstAliases to match the GNU RISC-V tools
2017-12-13 12:46:55 +00:00
priv-valid.s
[RISCV] Enable emission of alias instructions by default
2017-12-15 09:47:01 +00:00
relocations.s
[RISCV] Add support for %pcrel_lo.
2018-02-06 00:55:23 +00:00
rv32a-invalid.s
[RISCV] MC layer support for the standard RV64A instruction set extension
2017-12-07 10:59:12 +00:00
rv32a-valid.s
[RISCV] Enable emission of alias instructions by default
2017-12-15 09:47:01 +00:00
rv32c-invalid.s
[RISCV] Implement c.lui immediate operand constraint
2018-02-22 15:02:28 +00:00
rv32c-only-valid.s
[RISCV] Add ELFObjectFileBase::getRISCVFeatures let llvm-objdump could get RISCV target feature
2018-02-02 06:01:02 +00:00
rv32c-valid.s
[RISCV] Implement c.lui immediate operand constraint
2018-02-22 15:02:28 +00:00
rv32d-invalid.s
[RISCV] MC layer support for the standard RV32D instruction set extension
2017-12-07 10:46:23 +00:00
rv32d-valid.s
[RISCV] Enable emission of alias instructions by default
2017-12-15 09:47:01 +00:00
rv32dc-invalid.s
[RISCV] MC layer support for the remaining RVC instructions
2017-12-13 09:32:55 +00:00
rv32dc-valid.s
[RISCV] Add ELFObjectFileBase::getRISCVFeatures let llvm-objdump could get RISCV target feature
2018-02-02 06:01:02 +00:00
rv32f-invalid.s
[RISCV] MC layer support for the standard RV64F instruction set extension
2017-12-07 11:02:55 +00:00
rv32f-valid.s
[RISCV] Enable emission of alias instructions by default
2017-12-15 09:47:01 +00:00
rv32fc-invalid.s
[RISCV] MC layer support for the remaining RVC instructions
2017-12-13 09:32:55 +00:00
rv32fc-valid.s
[RISCV] Add ELFObjectFileBase::getRISCVFeatures let llvm-objdump could get RISCV target feature
2018-02-02 06:01:02 +00:00
rv32i-aliases-invalid.s
[RISCV] Enable emission of alias instructions by default
2017-12-15 09:47:01 +00:00
rv32i-aliases-valid.s
[RISCV] Enable emission of alias instructions by default
2017-12-15 09:47:01 +00:00
rv32i-invalid.s
[RISCV] Add support for %pcrel_lo.
2018-02-06 00:55:23 +00:00
rv32i-valid.s
[RISCV] Enable emission of alias instructions by default
2017-12-15 09:47:01 +00:00
rv32m-invalid.s
[RISCV] MC layer support for the standard RV64M instruction set extension
2017-12-07 10:56:07 +00:00
rv32m-valid.s
[RISCV] Enable emission of alias instructions by default
2017-12-15 09:47:01 +00:00
rv64a-invalid.s
[RISCV] MC layer support for the standard RV64A instruction set extension
2017-12-07 10:59:12 +00:00
rv64a-valid.s
[RISCV] Enable emission of alias instructions by default
2017-12-15 09:47:01 +00:00
rv64c-invalid.s
[RISCV] Change shift amount operand of RVC shift instructions to uimmlog2xlennonzero
2017-12-15 10:20:51 +00:00
rv64c-valid.s
[RISCV] Add ELFObjectFileBase::getRISCVFeatures let llvm-objdump could get RISCV target feature
2018-02-02 06:01:02 +00:00
rv64d-aliases-valid.s
[RISCV] Enable emission of alias instructions by default
2017-12-15 09:47:01 +00:00
rv64d-invalid.s
[RISCV] Add missed tests for RV64D MC layer support
2017-12-07 11:05:38 +00:00
rv64d-valid.s
[RISCV] Enable emission of alias instructions by default
2017-12-15 09:47:01 +00:00
rv64dc-valid.s
[RISCV] Add ELFObjectFileBase::getRISCVFeatures let llvm-objdump could get RISCV target feature
2018-02-02 06:01:02 +00:00
rv64f-aliases-valid.s
[RISCV] Enable emission of alias instructions by default
2017-12-15 09:47:01 +00:00
rv64f-invalid.s
[RISCV] MC layer support for the standard RV64F instruction set extension
2017-12-07 11:02:55 +00:00
rv64f-valid.s
[RISCV] Enable emission of alias instructions by default
2017-12-15 09:47:01 +00:00
rv64i-aliases-invalid.s
[RISCV] Enable emission of alias instructions by default
2017-12-15 09:47:01 +00:00
rv64i-aliases-valid.s
[RISCV] Enable emission of alias instructions by default
2017-12-15 09:47:01 +00:00
rv64i-invalid.s
[RISCV] MC layer support for the standard RV64I instructions
2017-12-07 10:53:48 +00:00
rv64i-valid.s
[RISCV] Enable emission of alias instructions by default
2017-12-15 09:47:01 +00:00
rv64m-valid.s
[RISCV] Enable emission of alias instructions by default
2017-12-15 09:47:01 +00:00
rvd-aliases-valid.s
[RISCV] Enable emission of alias instructions by default
2017-12-15 09:47:01 +00:00
rvf-aliases-valid.s
[RISCV] Enable emission of alias instructions by default
2017-12-15 09:47:01 +00:00
rvi-aliases-valid.s
[RISCV] Enable emission of alias instructions by default
2017-12-15 09:47:01 +00:00