Sanjay Patel 455ce7816c [InstCombine] fold a shifted bool zext to a select (2nd try) ...

The 1st attempt at rL374828 inserted the code
at the wrong position (outside of the constant-shift-amount
block). Trying again with an additional test to verify
const-ness.

For a constant shift amount, add the following fold.
shl (zext (i1 X)), ShAmt --> select (X, 1 << ShAmt, 0)

https://rise4fun.com/Alive/IZ9

Fixes PR42257.

Based on original patch by @zvi (Zvi Rackover)

Differential Revision: https://reviews.llvm.org/D63382

llvm-svn: 374886

2019-10-15 13:12:44 +00:00

..

CMakeLists.txt

[InstCombine] Optimize atomicrmw <op>, 0 into load atomic when possible

2019-02-07 21:27:23 +00:00

InstCombineAddSub.cpp

[InstCombine] Fold conditional sign-extend of high-bit-extract into high-bit-extract-with-signext (PR42389)

2019-10-07 20:53:27 +00:00

InstCombineAndOrXor.cpp

[InstCombine] foldUnsignedUnderflowCheck(): one last pattern with 'sub' (PR43251)

2019-09-25 22:59:59 +00:00

InstCombineAtomicRMW.cpp

[Alignment][NFC] Remove StoreInst::setAlignment(unsigned)

2019-10-03 13:17:21 +00:00

InstCombineCalls.cpp

[Alignment][NFC] Remove StoreInst::setAlignment(unsigned)

2019-10-03 13:17:21 +00:00

InstCombineCasts.cpp

[InstCombine] don't assume 'inbounds' for bitcast deref or null pointer in non-default address space

2019-10-13 17:19:08 +00:00

InstCombineCompares.cpp

[InstCombine] Move isSignBitCheck(), handle rest of the predicates

2019-10-07 20:53:08 +00:00

InstCombineInternal.h

[InstCombine] Move isSignBitCheck(), handle rest of the predicates

2019-10-07 20:53:08 +00:00

InstCombineLoadStoreAlloca.cpp

[Alignment][NFC] Remove StoreInst::setAlignment(unsigned)

2019-10-03 13:17:21 +00:00

InstCombineMulDivRem.cpp

[InstCombine] fold fneg disguised as select+fmul (PR43497)

2019-10-06 14:15:48 +00:00

InstCombinePHI.cpp

[InstCombine] SliceUpIllegalIntegerPHI - bail on out of range shifts

2019-06-24 13:13:36 +00:00

InstCombineSelect.cpp

[InstCombine] allow icmp+binop folds before min/max bailout (PR43310)

2019-09-22 14:31:53 +00:00

InstCombineShifts.cpp

[InstCombine] fold a shifted bool zext to a select (2nd try)

2019-10-15 13:12:44 +00:00

InstCombineSimplifyDemanded.cpp

[InstCombine][AMDGPU] Simplify tbuffer loads

2019-08-30 14:20:04 +00:00

InstCombineTables.td

InstCombine/AMDGPU: Add dimension-aware image intrinsics to SimplifyDemanded

2018-06-21 13:37:31 +00:00

InstCombineVectorOps.cpp

[InstCombine] fold extract+insert into identity shuffle

2019-09-08 19:03:01 +00:00

InstructionCombining.cpp

[InstCombine] Use m_Zero instead of isNullValue() when checking if a GEP index is all zeroes to prevent an infinite loop.

2019-09-26 17:20:50 +00:00

LLVMBuild.txt

Update the file headers across all of the LLVM projects in the monorepo

2019-01-19 08:50:56 +00:00