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llvm-project/llvm/test/CodeGen/MIR/AMDGPU
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Guillaume Chatelet b65fa48305 [Alignment] Migrate Attribute::getWith(Stack)Alignment 
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet, jdoerfert

Reviewed By: courbet

Subscribers: arsenm, jvesely, nhaehnle, hiraditya, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D68792

llvm-svn: 374884
2019-10-15 12:56:24 +00:00
..
expected-target-index-name.mir
[AMDGPU] Extend buffer intrinsics with swizzling
2019-10-02 17:22:36 +00:00
intrinsics.mir
[GISel]: Verify COPIES involving generic registers.
2018-02-09 01:27:23 +00:00
invalid-target-index-operand.mir
[AMDGPU] Extend buffer intrinsics with swizzling
2019-10-02 17:22:36 +00:00
lit.local.cfg
…
load-store-opt-dlc.mir
[AMDGPU] Extend buffer intrinsics with swizzling
2019-10-02 17:22:36 +00:00
machine-function-info-no-ir.mir
[Alignment] Migrate Attribute::getWith(Stack)Alignment
2019-10-15 12:56:24 +00:00
machine-function-info-register-parse-error1.mir
MIR: Allow targets to serialize MachineFunctionInfo
2019-03-14 22:54:43 +00:00
machine-function-info-register-parse-error2.mir
MIR: Allow targets to serialize MachineFunctionInfo
2019-03-14 22:54:43 +00:00
machine-function-info.ll
[Alignment] Migrate Attribute::getWith(Stack)Alignment
2019-10-15 12:56:24 +00:00
mfi-frame-offset-reg-class.mir
MIR: Allow targets to serialize MachineFunctionInfo
2019-03-14 22:54:43 +00:00
mfi-parse-error-frame-offset-reg.mir
MIR: Allow targets to serialize MachineFunctionInfo
2019-03-14 22:54:43 +00:00
mfi-parse-error-scratch-rsrc-reg.mir
MIR: Allow targets to serialize MachineFunctionInfo
2019-03-14 22:54:43 +00:00
mfi-parse-error-scratch-wave-offset-reg.mir
MIR: Allow targets to serialize MachineFunctionInfo
2019-03-14 22:54:43 +00:00
mfi-parse-error-stack-ptr-offset-reg.mir
MIR: Allow targets to serialize MachineFunctionInfo
2019-03-14 22:54:43 +00:00
mfi-scratch-rsrc-reg-reg-class.mir
MIR: Allow targets to serialize MachineFunctionInfo
2019-03-14 22:54:43 +00:00
mfi-scratch-wave-offset-reg-class.mir
MIR: Allow targets to serialize MachineFunctionInfo
2019-03-14 22:54:43 +00:00
mfi-stack-ptr-offset-reg-class.mir
MIR: Allow targets to serialize MachineFunctionInfo
2019-03-14 22:54:43 +00:00
mir-canon-multi.mir
[AMDGPU] Extend buffer intrinsics with swizzling
2019-10-02 17:22:36 +00:00
parse-order-reserved-regs.mir
[AMDGPU] Extend buffer intrinsics with swizzling
2019-10-02 17:22:36 +00:00
stack-id.mir
Describe stack-id as an enum
2019-06-17 09:13:29 +00:00
syncscopes.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
target-flags.mir
AMDGPU: Prepare for explicit absolute relocations in code generation
2019-06-16 17:43:37 +00:00
target-index-operands.mir
[AMDGPU] Extend buffer intrinsics with swizzling
2019-10-02 17:22:36 +00:00