Shilei Tian 1ca9fe6db3 Reapply "[Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (#100952)" ...

This reverts commit 36467bfe89f231458eafda3edb916c028f1f0619.

2024-08-14 17:16:47 -04:00

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AArch64

[AArch64] Add some uxtw peephole tests. NFC

2024-08-14 18:53:54 +01:00

AMDGPU

Reapply "[Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (#100952)"

2024-08-14 17:16:47 -04:00

ARC

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ARM

[TargetLowering][AMDGPU][ARM][RISCV][X86] Teach SimplifyDemandedBits to combine (srl (sra X, C1), ShAmt) -> sra(X, C1+ShAmt) (#101751)

2024-08-14 08:44:57 -07:00

AVR

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BPF

[BPF] Make llvm-objdump disasm default cpu v4 (#102166)

2024-08-06 18:23:46 -07:00

CSKY

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DirectX

Add normalize builtins and normalize HLSL function to DirectX and SPIR-V backend (#102683)

2024-08-13 15:15:19 -07:00

Generic

[VP] Merge ExpandVP pass into PreISelIntrinsicLowering (#101652)

2024-08-06 09:27:59 +02:00

Hexagon

[HEXAGON] Enable Utilize Mask Instruction Pass only if the Arch (#102880)

2024-08-13 13:30:20 +05:30

Inputs

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Lanai

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LoongArch

[LTO] enable ObjCARCContractPass only on optimized build (#101114)

2024-08-09 13:04:25 -07:00

M68k

[LTO] enable ObjCARCContractPass only on optimized build (#101114)

2024-08-09 13:04:25 -07:00

Mips

[TargetLowering][AMDGPU][ARM][RISCV][X86] Teach SimplifyDemandedBits to combine (srl (sra X, C1), ShAmt) -> sra(X, C1+ShAmt) (#101751)

2024-08-14 08:44:57 -07:00

MIR

Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)

2024-07-15 11:51:44 +04:00

MLRegAlloc

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MSP430

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NVPTX

[NVPTX] Add idp2a, idp4a intrinsics (#102763)

2024-08-14 13:31:16 -07:00

PowerPC

[TargetLowering][AMDGPU][ARM][RISCV][X86] Teach SimplifyDemandedBits to combine (srl (sra X, C1), ShAmt) -> sra(X, C1+ShAmt) (#101751)

2024-08-14 08:44:57 -07:00

RISCV

[RISCV][GISel] Remove support for s32 G_VAARG on RV64. (#102533)

2024-08-14 13:33:30 -07:00

SPARC

[Sparc] Remove custom lowering for ADD[CE] / SUB[CE] (#100861)

2024-07-28 18:22:40 +03:00

SPIRV

[SPIR-V] Add implementation of the non-const G_BUILD_VECTOR and fix emission of the OpGroupBroadcast instruction (#103050)

2024-08-14 11:42:48 +02:00

SystemZ

[SystemZ][z/OS] Continuation of __ptr32 support (#103393)

2024-08-14 13:26:30 -04:00

Thumb

[SelectionDAG] Expand [US]CMP using arithmetic on boolean values instead of selects (#98774)

2024-07-16 20:56:18 +01:00

Thumb2

[TargetLowering][AMDGPU][ARM][RISCV][X86] Teach SimplifyDemandedBits to combine (srl (sra X, C1), ShAmt) -> sra(X, C1+ShAmt) (#101751)

2024-08-14 08:44:57 -07:00

VE

[DAGCombiner] Freeze maybe poison operands when folding select to logic (#84924)

2024-07-22 17:19:46 +02:00

WebAssembly

[SelectionDAG] Scalarize binary ops of splats before legal types (#100749)

2024-08-15 00:07:00 +08:00

WinCFGuard

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WinEH

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X86

[X86] Check if an invoked function clobbers fp or bp (#103446)

2024-08-14 12:59:37 -07:00

XCore

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Xtensa

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