956482de13
These are treated as DBAR 0 on older uarchs, so we can start to unconditionally emit the new hints right away. Co-authored-by: WANG Rui <wangrui@loongson.cn>
60 lines
1.3 KiB
LLVM
60 lines
1.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=loongarch32 < %s | FileCheck %s --check-prefix=LA32
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; RUN: llc --mtriple=loongarch64 < %s | FileCheck %s --check-prefix=LA64
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define void @fence_acquire() nounwind {
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; LA32-LABEL: fence_acquire:
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; LA32: # %bb.0:
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; LA32-NEXT: dbar 20
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; LA32-NEXT: ret
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;
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; LA64-LABEL: fence_acquire:
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; LA64: # %bb.0:
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; LA64-NEXT: dbar 20
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; LA64-NEXT: ret
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fence acquire
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ret void
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}
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define void @fence_release() nounwind {
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; LA32-LABEL: fence_release:
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; LA32: # %bb.0:
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; LA32-NEXT: dbar 18
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; LA32-NEXT: ret
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;
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; LA64-LABEL: fence_release:
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; LA64: # %bb.0:
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; LA64-NEXT: dbar 18
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; LA64-NEXT: ret
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fence release
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ret void
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}
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define void @fence_acq_rel() nounwind {
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; LA32-LABEL: fence_acq_rel:
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; LA32: # %bb.0:
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; LA32-NEXT: dbar 16
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; LA32-NEXT: ret
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;
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; LA64-LABEL: fence_acq_rel:
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; LA64: # %bb.0:
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; LA64-NEXT: dbar 16
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; LA64-NEXT: ret
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fence acq_rel
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ret void
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}
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define void @fence_seq_cst() nounwind {
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; LA32-LABEL: fence_seq_cst:
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; LA32: # %bb.0:
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; LA32-NEXT: dbar 16
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; LA32-NEXT: ret
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;
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; LA64-LABEL: fence_seq_cst:
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; LA64: # %bb.0:
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; LA64-NEXT: dbar 16
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; LA64-NEXT: ret
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fence seq_cst
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ret void
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}
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