ffa829c4c5
For a label difference `A-B` in assembly, if A and B are separated by a linker-relaxable instruction, we should emit a pair of ADD/SUB relocations (e.g. R_RISCV_ADD32/R_RISCV_SUB32, R_RISCV_ADD64/R_RISCV_SUB64). However, the decision is made upfront at parsing time with inadequate heuristics (`requiresFixup`). As a result, LLVM integrated assembler incorrectly suppresses R_RISCV_ADD32/R_RISCV_SUB32 for the following code: ``` // Simplified from a workaround https://android-review.googlesource.com/c/platform/art/+/2619609 // Both end and begin are not defined yet. We decide ADD/SUB relocations upfront and don't know they will be needed. .4byte end-begin begin: call foo end: ``` To fix the bug, make two primary changes: * Delete `requiresFixups` and the overridden emitValueImpl (from D103539). This deletion requires accurate evaluateAsAbolute (D153097). * In MCAssembler::evaluateFixup, call handleAddSubRelocations to emit ADD/SUB relocations. However, there is a remaining issue in MCExpr.cpp:AttemptToFoldSymbolOffsetDifference. With MCAsmLayout, we may incorrectly fold A-B even when A and B are separated by a linker-relaxable instruction. This deficiency is acknowledged (see D153097), but was previously bypassed by eagerly emitting ADD/SUB using `requiresFixups`. To address this, we partially reintroduce `canFold` (from D61584, removed by D103539). Some expressions (e.g. .size and .fill) need to take the `MCAsmLayout` code path in AttemptToFoldSymbolOffsetDifference, avoiding relocations (weird, but matching GNU assembler and needed to match user expectation). Switch to evaluateKnownAbsolute to leverage the `InSet` condition. As a bonus, this change allows for the removal of some relocations for the FDE `address_range` field in the .eh_frame section. riscv64-64b-pcrel.s contains the main test. Add a linker relaxable instruction to dwarf-riscv-relocs.ll to test what it intends to test. Merge fixups-relax-diff.ll into fixups-diff.ll. Reviewed By: kito-cheng Differential Revision: https://reviews.llvm.org/D155357
50 lines
1.4 KiB
ArmAsm
50 lines
1.4 KiB
ArmAsm
# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+relax %s \
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# RUN: | llvm-readobj -r - | FileCheck -check-prefix RELAX %s
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# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=-relax %s \
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# RUN: | llvm-readobj -r - | FileCheck -check-prefix NORELAX %s
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# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+relax %s \
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# RUN: | llvm-readobj -r - | FileCheck -check-prefix RELAX %s
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# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=-relax %s \
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# RUN: | llvm-readobj -r - | FileCheck -check-prefix NORELAX %s
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# NORELAX: Relocations [
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# NORELAX-NEXT: .rela.text {
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# NORELAX-NEXT: R_RISCV_CALL_PLT
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# NORELAX-NEXT: }
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# NORELAX-NEXT: ]
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.globl G1
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.globl G2
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.L1:
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G1:
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call extern
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.L2:
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G2:
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.data
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.dword .L2-.L1
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.dword G2-G1
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.word .L2-.L1
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.word G2-G1
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.half .L2-.L1
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.half G2-G1
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.byte .L2-.L1
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.byte G2-G1
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# RELAX: 0x0 R_RISCV_ADD64 .L2 0x0
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# RELAX: 0x0 R_RISCV_SUB64 .L1 0x0
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# RELAX: 0x8 R_RISCV_ADD64 G2 0x0
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# RELAX: 0x8 R_RISCV_SUB64 G1 0x0
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# RELAX: 0x10 R_RISCV_ADD32 .L2 0x0
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# RELAX: 0x10 R_RISCV_SUB32 .L1 0x0
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# RELAX: 0x14 R_RISCV_ADD32 G2 0x0
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# RELAX: 0x14 R_RISCV_SUB32 G1 0x0
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# RELAX: 0x18 R_RISCV_ADD16 .L2 0x0
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# RELAX: 0x18 R_RISCV_SUB16 .L1 0x0
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# RELAX: 0x1A R_RISCV_ADD16 G2 0x0
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# RELAX: 0x1A R_RISCV_SUB16 G1 0x0
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# RELAX: 0x1C R_RISCV_ADD8 .L2 0x0
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# RELAX: 0x1C R_RISCV_SUB8 .L1 0x0
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# RELAX: 0x1D R_RISCV_ADD8 G2 0x0
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# RELAX: 0x1D R_RISCV_SUB8 G1 0x0
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