e9a4b8e397
When AtomicOrdering is release or stronger, use
amswap_db.[w/d] $zero, $a1, $a0
instead of
dbar 0
st.[w/d] $a0, $a1, 0
Thanks to @xry111 for the suggestion: https://reviews.llvm.org/D128901#3626635
Differential Revision: https://reviews.llvm.org/D129838
120 lines
3.7 KiB
LLVM
120 lines
3.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S --mtriple=loongarch32 --atomic-expand %s | FileCheck %s --check-prefix=LA32
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; RUN: opt -S --mtriple=loongarch64 --atomic-expand %s | FileCheck %s --check-prefix=LA64
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define i8 @load_acquire_i8(ptr %ptr) {
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; LA32-LABEL: @load_acquire_i8(
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; LA32-NEXT: [[VAL:%.*]] = load atomic i8, ptr [[PTR:%.*]] monotonic, align 1
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; LA32-NEXT: fence acquire
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; LA32-NEXT: ret i8 [[VAL]]
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;
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; LA64-LABEL: @load_acquire_i8(
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; LA64-NEXT: [[VAL:%.*]] = load atomic i8, ptr [[PTR:%.*]] monotonic, align 1
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; LA64-NEXT: fence acquire
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; LA64-NEXT: ret i8 [[VAL]]
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;
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%val = load atomic i8, ptr %ptr acquire, align 1
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ret i8 %val
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}
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define i16 @load_acquire_i16(ptr %ptr) {
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; LA32-LABEL: @load_acquire_i16(
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; LA32-NEXT: [[VAL:%.*]] = load atomic i16, ptr [[PTR:%.*]] monotonic, align 2
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; LA32-NEXT: fence acquire
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; LA32-NEXT: ret i16 [[VAL]]
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;
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; LA64-LABEL: @load_acquire_i16(
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; LA64-NEXT: [[VAL:%.*]] = load atomic i16, ptr [[PTR:%.*]] monotonic, align 2
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; LA64-NEXT: fence acquire
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; LA64-NEXT: ret i16 [[VAL]]
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;
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%val = load atomic i16, ptr %ptr acquire, align 2
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ret i16 %val
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}
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define i32 @load_acquire_i32(ptr %ptr) {
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; LA32-LABEL: @load_acquire_i32(
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; LA32-NEXT: [[VAL:%.*]] = load atomic i32, ptr [[PTR:%.*]] monotonic, align 4
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; LA32-NEXT: fence acquire
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; LA32-NEXT: ret i32 [[VAL]]
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;
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; LA64-LABEL: @load_acquire_i32(
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; LA64-NEXT: [[VAL:%.*]] = load atomic i32, ptr [[PTR:%.*]] monotonic, align 4
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; LA64-NEXT: fence acquire
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; LA64-NEXT: ret i32 [[VAL]]
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;
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%val = load atomic i32, ptr %ptr acquire, align 4
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ret i32 %val
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}
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define i64 @load_acquire_i64(ptr %ptr) {
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; LA32-LABEL: @load_acquire_i64(
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; LA32-NEXT: [[TMP1:%.*]] = call i64 @__atomic_load_8(ptr [[PTR:%.*]], i32 2)
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; LA32-NEXT: ret i64 [[TMP1]]
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;
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; LA64-LABEL: @load_acquire_i64(
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; LA64-NEXT: [[VAL:%.*]] = load atomic i64, ptr [[PTR:%.*]] monotonic, align 8
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; LA64-NEXT: fence acquire
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; LA64-NEXT: ret i64 [[VAL]]
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;
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%val = load atomic i64, ptr %ptr acquire, align 8
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ret i64 %val
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}
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define void @store_release_i8(ptr %ptr, i8 signext %v) {
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; LA32-LABEL: @store_release_i8(
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; LA32-NEXT: fence release
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; LA32-NEXT: store atomic i8 [[V:%.*]], ptr [[PTR:%.*]] monotonic, align 1
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; LA32-NEXT: ret void
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;
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; LA64-LABEL: @store_release_i8(
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; LA64-NEXT: fence release
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; LA64-NEXT: store atomic i8 [[V:%.*]], ptr [[PTR:%.*]] monotonic, align 1
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; LA64-NEXT: ret void
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;
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store atomic i8 %v, ptr %ptr release, align 1
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ret void
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}
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define void @store_release_i16(ptr %ptr, i16 signext %v) {
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; LA32-LABEL: @store_release_i16(
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; LA32-NEXT: fence release
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; LA32-NEXT: store atomic i16 [[V:%.*]], ptr [[PTR:%.*]] monotonic, align 2
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; LA32-NEXT: ret void
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;
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; LA64-LABEL: @store_release_i16(
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; LA64-NEXT: fence release
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; LA64-NEXT: store atomic i16 [[V:%.*]], ptr [[PTR:%.*]] monotonic, align 2
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; LA64-NEXT: ret void
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;
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store atomic i16 %v, ptr %ptr release, align 2
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ret void
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}
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define void @store_release_i32(ptr %ptr, i32 signext %v) {
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; LA32-LABEL: @store_release_i32(
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; LA32-NEXT: fence release
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; LA32-NEXT: store atomic i32 [[V:%.*]], ptr [[PTR:%.*]] monotonic, align 4
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; LA32-NEXT: ret void
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;
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; LA64-LABEL: @store_release_i32(
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; LA64-NEXT: store atomic i32 [[V:%.*]], ptr [[PTR:%.*]] release, align 4
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; LA64-NEXT: ret void
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;
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store atomic i32 %v, ptr %ptr release, align 4
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ret void
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}
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define void @store_release_i64(ptr %ptr, i64 %v) {
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; LA32-LABEL: @store_release_i64(
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; LA32-NEXT: call void @__atomic_store_8(ptr [[PTR:%.*]], i64 [[V:%.*]], i32 3)
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; LA32-NEXT: ret void
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;
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; LA64-LABEL: @store_release_i64(
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; LA64-NEXT: store atomic i64 [[V:%.*]], ptr [[PTR:%.*]] release, align 8
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; LA64-NEXT: ret void
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;
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store atomic i64 %v, ptr %ptr release, align 8
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ret void
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}
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