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llvm-project
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llvm
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test
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Transforms
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PhaseOrdering
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AArch64
History
Craig Topper
03d4a9d94d
[InstCombine] Set disjoint flag when turning Add into Or. (
#72702
)
...
The disjoint flag was recently added to IR in
#72583
2023-11-27 12:54:11 -08:00
..
constraint-elimination-placement.ll
Revert "[PM] Execute IndVarSimplifyPass precede RessociatePass" (
#71617
)
2023-11-08 09:22:55 +08:00
globals-aa-required-for-vectorization.ll
…
hoisting-sinking-required-for-vectorization.ll
[opt] Infer DataLayout from triple if not specified
2023-10-26 12:07:37 -07:00
lit.local.cfg
[NFC][Py Reformat] Reformat lit.local.cfg python files in llvm
2023-05-17 17:03:15 +02:00
loopflatten.ll
Revert "[PM] Execute IndVarSimplifyPass precede RessociatePass" (
#71617
)
2023-11-08 09:22:55 +08:00
matrix-extract-insert.ll
Revert "[PM] Execute IndVarSimplifyPass precede RessociatePass" (
#71617
)
2023-11-08 09:22:55 +08:00
mul-ov.ll
…
peel-multiple-unreachable-exits-for-vectorization.ll
[InstCombine] Set disjoint flag when turning Add into Or. (
#72702
)
2023-11-27 12:54:11 -08:00
quant_4x4.ll
[PhaseOrdering] Add test for quant_4x4 vectorization (NFC)
2023-08-08 17:36:07 +02:00
sinking-vs-if-conversion.ll
[PhaseOrdering] Add tests where early sinking prevents if-conversion.
2023-11-16 20:31:21 +00:00
