610139d2d9
The 'emit_c_wrappers' option in the FuncToLLVM conversion requests C interface wrappers to be emitted for every builtin function in the module. While this has been useful to bootstrap the interface, it is problematic in the longer term as it may unintentionally affect the functions that should retain their existing interface, e.g., libm functions obtained by lowering math operations (see D126964 for an example). Since D77314, we have a finer-grain control over interface generation via an attribute that avoids the problem entirely. Remove the 'emit_c_wrappers' option. Introduce the '-llvm-request-c-wrappers' pass that can be run in any pipeline that needs blanket emission of functions to annotate all builtin functions with the attribute before performing the usual lowering that accounts for the attribute. Reviewed By: chelini Differential Revision: https://reviews.llvm.org/D127952
187 lines
8.7 KiB
C++
187 lines
8.7 KiB
C++
//===- LowerGpuOpsToROCDLOps.cpp - MLIR GPU to ROCDL lowering passes ------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements a pass to generate ROCDLIR operations for higher-level
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// GPU operations.
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Conversion/ControlFlowToLLVM/ControlFlowToLLVM.h"
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#include "mlir/Conversion/GPUToROCDL/GPUToROCDLPass.h"
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#include "mlir/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.h"
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#include "mlir/Conversion/ArithmeticToLLVM/ArithmeticToLLVM.h"
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#include "mlir/Conversion/FuncToLLVM/ConvertFuncToLLVM.h"
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#include "mlir/Conversion/LLVMCommon/ConversionTarget.h"
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#include "mlir/Conversion/LLVMCommon/LoweringOptions.h"
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#include "mlir/Conversion/LLVMCommon/Pattern.h"
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#include "mlir/Conversion/LLVMCommon/TypeConverter.h"
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#include "mlir/Conversion/MemRefToLLVM/MemRefToLLVM.h"
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#include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h"
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#include "mlir/Conversion/VectorToROCDL/VectorToROCDL.h"
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#include "mlir/Dialect/Func/IR/FuncOps.h"
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#include "mlir/Dialect/GPU/IR/GPUDialect.h"
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#include "mlir/Dialect/GPU/Transforms/Passes.h"
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#include "mlir/Dialect/LLVMIR/ROCDLDialect.h"
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#include "mlir/Dialect/Math/IR/Math.h"
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#include "mlir/Dialect/Vector/IR/VectorOps.h"
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#include "mlir/Pass/Pass.h"
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#include "mlir/Transforms/DialectConversion.h"
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#include "mlir/Transforms/GreedyPatternRewriteDriver.h"
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#include "llvm/Support/FormatVariadic.h"
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#include "../GPUCommon/GPUOpsLowering.h"
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#include "../GPUCommon/IndexIntrinsicsOpLowering.h"
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#include "../GPUCommon/OpToFuncCallLowering.h"
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#include "../PassDetail.h"
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using namespace mlir;
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namespace {
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/// Import the GPU Ops to ROCDL Patterns.
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#include "GPUToROCDL.cpp.inc"
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// A pass that replaces all occurrences of GPU device operations with their
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// corresponding ROCDL equivalent.
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//
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// This pass only handles device code and is not meant to be run on GPU host
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// code.
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struct LowerGpuOpsToROCDLOpsPass
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: public ConvertGpuOpsToROCDLOpsBase<LowerGpuOpsToROCDLOpsPass> {
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LowerGpuOpsToROCDLOpsPass() = default;
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LowerGpuOpsToROCDLOpsPass(unsigned indexBitwidth, gpu::amd::Runtime runtime) {
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this->indexBitwidth = indexBitwidth;
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this->runtime = runtime;
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}
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void runOnOperation() override {
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gpu::GPUModuleOp m = getOperation();
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// Request C wrapper emission.
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for (auto func : m.getOps<func::FuncOp>()) {
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func->setAttr(LLVM::LLVMDialect::getEmitCWrapperAttrName(),
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UnitAttr::get(&getContext()));
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}
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/// Customize the bitwidth used for the device side index computations.
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LowerToLLVMOptions options(
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m.getContext(),
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DataLayout(cast<DataLayoutOpInterface>(m.getOperation())));
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if (indexBitwidth != kDeriveIndexBitwidthFromDataLayout)
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options.overrideIndexBitwidth(indexBitwidth);
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LLVMTypeConverter converter(m.getContext(), options);
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RewritePatternSet patterns(m.getContext());
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RewritePatternSet llvmPatterns(m.getContext());
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populateGpuRewritePatterns(patterns);
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(void)applyPatternsAndFoldGreedily(m, std::move(patterns));
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mlir::arith::populateArithmeticToLLVMConversionPatterns(converter,
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llvmPatterns);
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populateAMDGPUToROCDLConversionPatterns(converter, llvmPatterns);
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populateVectorToLLVMConversionPatterns(converter, llvmPatterns);
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populateVectorToROCDLConversionPatterns(converter, llvmPatterns);
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cf::populateControlFlowToLLVMConversionPatterns(converter, llvmPatterns);
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populateFuncToLLVMConversionPatterns(converter, llvmPatterns);
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populateMemRefToLLVMConversionPatterns(converter, llvmPatterns);
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populateGpuToROCDLConversionPatterns(converter, llvmPatterns, runtime);
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LLVMConversionTarget target(getContext());
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configureGpuToROCDLConversionLegality(target);
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if (failed(applyPartialConversion(m, target, std::move(llvmPatterns))))
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signalPassFailure();
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}
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};
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} // namespace
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void mlir::configureGpuToROCDLConversionLegality(ConversionTarget &target) {
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target.addIllegalOp<func::FuncOp>();
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target.addLegalDialect<::mlir::LLVM::LLVMDialect>();
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target.addLegalDialect<ROCDL::ROCDLDialect>();
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target.addIllegalDialect<gpu::GPUDialect>();
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target.addIllegalOp<LLVM::CosOp, LLVM::ExpOp, LLVM::Exp2Op, LLVM::FAbsOp,
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LLVM::FCeilOp, LLVM::FFloorOp, LLVM::LogOp, LLVM::Log10Op,
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LLVM::Log2Op, LLVM::PowOp, LLVM::SinOp, LLVM::SqrtOp>();
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// TODO: Remove once we support replacing non-root ops.
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target.addLegalOp<gpu::YieldOp, gpu::GPUModuleOp, gpu::ModuleEndOp>();
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}
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void mlir::populateGpuToROCDLConversionPatterns(
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LLVMTypeConverter &converter, RewritePatternSet &patterns,
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mlir::gpu::amd::Runtime runtime) {
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using mlir::gpu::amd::Runtime;
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populateWithGenerated(patterns);
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patterns
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.add<GPUIndexIntrinsicOpLowering<gpu::ThreadIdOp, ROCDL::ThreadIdXOp,
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ROCDL::ThreadIdYOp, ROCDL::ThreadIdZOp>,
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GPUIndexIntrinsicOpLowering<gpu::BlockDimOp, ROCDL::BlockDimXOp,
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ROCDL::BlockDimYOp, ROCDL::BlockDimZOp>,
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GPUIndexIntrinsicOpLowering<gpu::BlockIdOp, ROCDL::BlockIdXOp,
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ROCDL::BlockIdYOp, ROCDL::BlockIdZOp>,
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GPUIndexIntrinsicOpLowering<gpu::GridDimOp, ROCDL::GridDimXOp,
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ROCDL::GridDimYOp, ROCDL::GridDimZOp>,
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GPUReturnOpLowering>(converter);
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patterns.add<GPUFuncOpLowering>(
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converter, /*allocaAddrSpace=*/5,
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StringAttr::get(&converter.getContext(),
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ROCDL::ROCDLDialect::getKernelFuncAttrName()));
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if (Runtime::HIP == runtime) {
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patterns.add<GPUPrintfOpToHIPLowering>(converter);
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} else if (Runtime::OpenCL == runtime) {
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// Use address space = 4 to match the OpenCL definition of printf()
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patterns.add<GPUPrintfOpToLLVMCallLowering>(converter, /*addressSpace=*/4);
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}
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patterns.add<OpToFuncCallLowering<math::AbsOp>>(converter, "__ocml_fabs_f32",
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"__ocml_fabs_f64");
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patterns.add<OpToFuncCallLowering<math::AtanOp>>(converter, "__ocml_atan_f32",
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"__ocml_atan_f64");
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patterns.add<OpToFuncCallLowering<math::Atan2Op>>(
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converter, "__ocml_atan2_f32", "__ocml_atan2_f64");
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patterns.add<OpToFuncCallLowering<math::CeilOp>>(converter, "__ocml_ceil_f32",
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"__ocml_ceil_f64");
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patterns.add<OpToFuncCallLowering<math::CosOp>>(converter, "__ocml_cos_f32",
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"__ocml_cos_f64");
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patterns.add<OpToFuncCallLowering<math::ExpOp>>(converter, "__ocml_exp_f32",
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"__ocml_exp_f64");
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patterns.add<OpToFuncCallLowering<math::Exp2Op>>(converter, "__ocml_exp2_f32",
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"__ocml_exp2_f64");
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patterns.add<OpToFuncCallLowering<math::ExpM1Op>>(
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converter, "__ocml_expm1_f32", "__ocml_expm1_f64");
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patterns.add<OpToFuncCallLowering<math::FloorOp>>(
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converter, "__ocml_floor_f32", "__ocml_floor_f64");
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patterns.add<OpToFuncCallLowering<math::LogOp>>(converter, "__ocml_log_f32",
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"__ocml_log_f64");
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patterns.add<OpToFuncCallLowering<math::Log10Op>>(
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converter, "__ocml_log10_f32", "__ocml_log10_f64");
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patterns.add<OpToFuncCallLowering<math::Log1pOp>>(
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converter, "__ocml_log1p_f32", "__ocml_log1p_f64");
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patterns.add<OpToFuncCallLowering<math::Log2Op>>(converter, "__ocml_log2_f32",
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"__ocml_log2_f64");
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patterns.add<OpToFuncCallLowering<math::PowFOp>>(converter, "__ocml_pow_f32",
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"__ocml_pow_f64");
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patterns.add<OpToFuncCallLowering<math::RsqrtOp>>(
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converter, "__ocml_rsqrt_f32", "__ocml_rsqrt_f64");
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patterns.add<OpToFuncCallLowering<math::SinOp>>(converter, "__ocml_sin_f32",
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"__ocml_sin_f64");
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patterns.add<OpToFuncCallLowering<math::SqrtOp>>(converter, "__ocml_sqrt_f32",
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"__ocml_sqrt_f64");
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patterns.add<OpToFuncCallLowering<math::TanhOp>>(converter, "__ocml_tanh_f32",
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"__ocml_tanh_f64");
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}
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std::unique_ptr<OperationPass<gpu::GPUModuleOp>>
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mlir::createLowerGpuOpsToROCDLOpsPass(unsigned indexBitwidth,
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gpu::amd::Runtime runtime) {
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return std::make_unique<LowerGpuOpsToROCDLOpsPass>(indexBitwidth, runtime);
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}
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