quic_hchandel 163935a48d

[RISCV] Add Qualcomm uC Xqcilo (Large Offset Load Store) extension (#123881) ...

This extension adds eight 48 bit load store instructions.

The current spec can be found at:
https://github.com/quic/riscv-unified-db/releases/latest

This patch adds assembler only support.

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Co-authored-by: Harsh Chandel <hchandel@qti.qualcomm.com>

2025-01-23 10:14:25 +05:30

..

Unix

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Windows

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AArch64TargetParser.cpp

[FMV][GlobalOpt] Statically resolve calls to versioned functions. (#87939)

2025-01-17 10:49:43 +00:00

ARMTargetParser.cpp

[LLVM] [Clang] Support for Gentoo *t64 triples (64-bit time_t ABIs) (#111302)

2024-10-14 11:18:04 +00:00

ARMTargetParserCommon.cpp

[ARM][AArch64] Introduce the Armv9.6-A architecture version (#110825)

2024-10-04 10:12:41 +01:00

CMakeLists.txt

[PowerPC] add TargetParser for PPC target (#97541)

2024-07-25 13:46:59 +08:00

CSKYTargetParser.cpp

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Host.cpp

[LoongArch] Support sc.q instruction for 128bit cmpxchg operation (#116771)

2025-01-23 12:11:07 +08:00

LoongArchTargetParser.cpp

[LoongArch] Support sc.q instruction for 128bit cmpxchg operation (#116771)

2025-01-23 12:11:07 +08:00

PPCTargetParser.cpp

[PowerPC] fix default cpu setting

2024-07-25 09:55:00 -04:00

RISCVISAInfo.cpp

[RISCV] Add Qualcomm uC Xqcilo (Large Offset Load Store) extension (#123881)

2025-01-23 10:14:25 +05:30

RISCVTargetParser.cpp

[RISCV] Support __builtin_cpu_is

2024-11-22 22:58:54 +08:00

SubtargetFeature.cpp

[TargetParser] Remove unused includes (NFC) (#116929)

2024-11-20 06:52:45 -08:00

TargetParser.cpp

[NFC][AMDGPU] Clean-up feature parsing for AMDGCNSPIRV. (#123519)

2025-01-20 02:30:29 +00:00

Triple.cpp

[LLVM][Triple] Add an argument to specify canonical form to Triple::normalize (#122935)

2025-01-14 20:12:29 -05:00

X86TargetParser.cpp

[X86] Add missing feature USERMSR to DiamondRapids (#120061)

2024-12-16 20:29:26 +08:00