Changpeng Fang e703c735df

AMDGPU: Remove incorrect uses of SubtaretPredicate around DS_Reals (#85001) ...

SubtargetPredicate is copied from DS_Pseudo to DS_Real. We should not
use another SubtargetPredicate assignment around DS_Real, because doing
so will override the predicate from DS_Pseudo.

For example, for DS_ADD_RTN_F64, SubtargetPredicate was set to
HasLdsAtomicAddF64 in Pseudo. And it will be overridden to isGFX90APlus
if we assign isGFX90APlus to SubtargetPredicate in Real definition.

2024-03-13 09:49:30 -07:00

..

AsmParser

[AMDGPU] Replace isInlinableLiteral16 with specific version (#84402)

2024-03-08 14:49:52 -05:00

Disassembler

[AMDGPU] Only try DecoderTables for the current subtarget. NFCI. (#82992)

2024-02-26 13:02:08 +00:00

MCA

[AMDGPU][SIInsertWaitcnts] Do not add s_waitcnt when the counters are known to be 0 already (#72830)

2023-12-15 12:33:32 +01:00

MCTargetDesc

[AMDGPU] Use a consistent DwarfEH register flavour (#84513)

2024-03-11 10:36:38 -04:00

TargetInfo

[AMDGPU] Eliminate SIMCCodeEmitter and de-virtualise encoding methods.

2023-07-05 10:13:33 +01:00

Utils

[AMDGPU] Adding the amdgpu_num_work_groups function attribute (#79035)

2024-03-12 10:30:39 -07:00

AMDGPU.h

[AMDGPU] Add IR-level pass to rewrite away address space 7 (#77952)

2024-03-06 09:49:58 -06:00

AMDGPU.td

[AMDGPU][True16] Make NotHasTrue16BitInsts a True16Predicate (#84771)

2024-03-11 13:58:45 -04:00

AMDGPUAliasAnalysis.cpp

[AA] Skip the layer of indirection in returning conservative results.

2023-07-28 12:13:35 -07:00

AMDGPUAliasAnalysis.h

[AA] Allow for flow-sensitive analyses.

2022-12-15 21:04:38 -08:00

AMDGPUAlwaysInlinePass.cpp

[amdgpu] Implement dynamic LDS accesses from non-kernel functions

2023-04-04 20:06:34 +01:00

AMDGPUAnnotateKernelFeatures.cpp

…

AMDGPUAnnotateUniformValues.cpp

[AMDGPU] Replace LegacyDA with Uniformity Analysis in AnnotateUniformValues

2023-02-28 13:05:38 -07:00

AMDGPUArgumentUsageInfo.cpp

[AMDGPU] Add DAG ISel support for preloaded kernel arguments

2023-09-25 09:32:59 -07:00

AMDGPUArgumentUsageInfo.h

[AMDGPU] Miscellaneous clang-format changes (#75186)

2023-12-12 14:26:04 +00:00

AMDGPUAsmPrinter.cpp

[AMDGPU] Rename getNumVGPRBlocks. NFC (#84161)

2024-03-07 12:46:42 +01:00

AMDGPUAsmPrinter.h

[AMDGPU] Remove AMDGPUAsmPrinter::isBlockOnlyReachableByFallthrough (#71407)

2023-11-06 16:29:52 +00:00

AMDGPUAtomicOptimizer.cpp

[AMDGPU] Fix scan of atomicFSub in AtomicOptimizer. (#66082)

2023-09-13 09:57:10 +05:30

AMDGPUAttributes.def

Partially reapply "AMDGPU: Invert handling of enqueued block detection"

2023-01-12 15:02:16 -05:00

AMDGPUAttributor.cpp

[AMDGPU] Add an asm directive to track code_object_version (#76267)

2024-01-21 11:54:47 -05:00

AMDGPUCallingConv.td

[AMDGPU] promote i1 arg type for amdgpu_cs (#82971)

2024-03-01 14:25:46 +05:30

AMDGPUCallLowering.cpp

[AMDGPU] Add an asm directive to track code_object_version (#76267)

2024-01-21 11:54:47 -05:00

AMDGPUCallLowering.h

[AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (#68186)

2023-11-06 12:30:07 +01:00

AMDGPUCodeGenPrepare.cpp

[AMDGPU] Improve detection of non-null addrspacecast operands (#82311)

2024-03-01 14:01:10 +01:00

AMDGPUCombine.td

[AMDGPU][GlobalISel] Add fdiv / sqrt to rsq combine (#78673)

2024-02-22 09:47:36 +01:00

AMDGPUCombinerHelper.cpp

[AMDGPU] Min/max changes for GFX12 (#75214)

2023-12-13 14:18:10 +01:00

AMDGPUCombinerHelper.h

[llvm] Fix include guards

2023-06-13 10:47:18 +01:00

AMDGPUCtorDtorLowering.cpp

[llvm] Replace calls to Type::getPointerTo (NFC)

2023-11-30 13:18:51 -06:00

AMDGPUCtorDtorLowering.h

AMDGPU: Port AMDGPUCtorDtorLowering to new PM

2022-12-09 13:43:38 -05:00

AMDGPUExportClustering.cpp

…

AMDGPUExportClustering.h

…

AMDGPUFeatures.td

…

AMDGPUFrameLowering.cpp

…

AMDGPUFrameLowering.h

…

AMDGPUGenRegisterBankInfo.def

Silence illegal address computation warning (#83244)

2024-03-01 21:41:12 +05:30

AMDGPUGISel.td

[AMDGPU] Add GFX12 WMMA and SWMMAC instructions (#77795)

2024-01-24 13:43:07 +01:00

AMDGPUGlobalISelDivergenceLowering.cpp

AMDGPU/GlobalISel: lane masks merging (#73337)

2024-02-29 13:57:59 +01:00

AMDGPUGlobalISelUtils.cpp

[AMDGPU] Remove hasAtomicFaddRtnForTy as it is not used anywhere (#82841)

2024-02-23 21:14:38 -05:00

AMDGPUGlobalISelUtils.h

[AMDGPU] Remove hasAtomicFaddRtnForTy as it is not used anywhere (#82841)

2024-02-23 21:14:38 -05:00

AMDGPUHSAMetadataStreamer.cpp

[AMDGPU] Adding the amdgpu_num_work_groups function attribute (#79035)

2024-03-12 10:30:39 -07:00

AMDGPUHSAMetadataStreamer.h

[AMDGPU] Introduce Code Object V6 (#76954)

2024-02-05 08:19:53 +01:00

AMDGPUIGroupLP.cpp

[AMDGPU] Do not attempt to fallback to default mutations (#83208)

2024-02-27 18:04:59 -08:00

AMDGPUIGroupLP.h

[AMDGPU] Do not attempt to fallback to default mutations (#83208)

2024-02-27 18:04:59 -08:00

AMDGPUImageIntrinsicOptimizer.cpp

[AMDGPU] Use llvm::none_of (NFC)

2024-01-24 00:27:37 -08:00

AMDGPUInsertDelayAlu.cpp

[AMDGPU] Add functions for composing and decomposing S_WAIT_DEPCTR operands

2023-07-04 11:02:12 +01:00

AMDGPUInsertSingleUseVDST.cpp

[AMDGPU] New AMDGPUInsertSingleUseVDST pass (#72388)

2023-11-24 10:23:06 +00:00

AMDGPUInstCombineIntrinsic.cpp

[ValueTracking][NFC] Pass SimplifyQuery to computeKnownFPClass family (#80657)

2024-02-06 02:30:12 +08:00

AMDGPUInstrInfo.cpp

Restore "[GlobalISel] GIntrinsic subclass to represent intrinsics in Generic Machine IR"

2023-07-27 14:49:17 +05:30

AMDGPUInstrInfo.h

Restore "[GlobalISel] GIntrinsic subclass to represent intrinsics in Generic Machine IR"

2023-07-27 14:49:17 +05:30

AMDGPUInstrInfo.td

[AMDGPU] Min/max changes for GFX12 (#75214)

2023-12-13 14:18:10 +01:00

AMDGPUInstructions.td

[AMDGPU] Fix canonicalization of truncated values. (#83054)

2024-03-13 12:08:39 +00:00

AMDGPUInstructionSelector.cpp

[KnownBits] Add API for nuw flag in computeForAddSub; NFC

2024-03-05 12:59:58 -06:00

AMDGPUInstructionSelector.h

[AMDGPU] Clean up functions for checking inline literals (#81282)

2024-02-15 12:11:51 -05:00

AMDGPUISelDAGToDAG.cpp

[AMDGPU] Replace isInlinableLiteral16 with specific version (#84402)

2024-03-08 14:49:52 -05:00

AMDGPUISelDAGToDAG.h

[AMDGPU] Clean up functions for checking inline literals (#81282)

2024-02-15 12:11:51 -05:00

AMDGPUISelLowering.cpp

[AMDGPU] Fix OpenCL conformance test failures for ctlz. (#83170)

2024-02-29 22:28:13 +00:00

AMDGPUISelLowering.h

[AMDGPU] Remove unnecessary add instructions in ctlz.i8 (#77615)

2024-01-19 10:16:46 +00:00

AMDGPULateCodeGenPrepare.cpp

[AMDGPU] Do not widen scalar loads on GFX12 (#78724)

2024-01-19 15:30:07 +00:00

AMDGPULegalizerInfo.cpp

[AMDGPU] Implement 'llvm.get.fpenv' and 'llvm.set.fpenv' (#83906)

2024-03-06 08:11:54 -06:00

AMDGPULegalizerInfo.h

[AMDGPU] Implement 'llvm.get.fpenv' and 'llvm.set.fpenv' (#83906)

2024-03-06 08:11:54 -06:00

AMDGPULibCalls.cpp

[ValueTracking][NFC] Pass SimplifyQuery to computeKnownFPClass family (#80657)

2024-02-06 02:30:12 +08:00

AMDGPULibFunc.cpp

[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956)

2023-12-11 21:01:36 -08:00

AMDGPULibFunc.h

AMDGPU: Use pown instead of pow if known integral

2023-09-01 08:22:16 -04:00

AMDGPULowerBufferFatPointers.cpp

[NFC][AMDGPU] Fix redundant assignment from #77952 (#84586)

2024-03-11 09:34:50 -05:00

AMDGPULowerKernelArguments.cpp

[AMDGPU] Enable kernel arg preloading with gfx90a (#81180)

2024-02-12 22:33:29 -08:00

AMDGPULowerKernelAttributes.cpp

[AMDGPU] Add an asm directive to track code_object_version (#76267)

2024-01-21 11:54:47 -05:00

AMDGPULowerModuleLDSPass.cpp

[AMDGPU] Let LowerModuleLDS run twice on the same module (#81729)

2024-03-11 09:20:01 +01:00

AMDGPUMachineCFGStructurizer.cpp

Use object directly instead of accessing ArrayRef (#83263)

2024-03-01 19:15:42 +05:30

AMDGPUMachineFunction.cpp

[AMDGPU] Add dynamic LDS size implicit kernel argument to CO-v5 (#65273)

2024-01-04 19:05:12 +05:30

AMDGPUMachineFunction.h

[AMDGPU] Add dynamic LDS size implicit kernel argument to CO-v5 (#65273)

2024-01-04 19:05:12 +05:30

AMDGPUMachineModuleInfo.cpp

…

AMDGPUMachineModuleInfo.h

std::optional::value => operator*/operator->

2022-12-17 00:42:05 +00:00

AMDGPUMacroFusion.cpp

[DAG] clang-format createBranchMacroFusionDAGMutation calls. NFC.

2023-11-20 12:13:09 +00:00

AMDGPUMacroFusion.h

…

AMDGPUMarkLastScratchLoad.cpp

[AMDGPU] Add mark last scratch load pass (#75512)

2024-01-18 09:36:44 +01:00

AMDGPUMCInstLower.cpp

[AMDGPU] Fix expensive-checks build.

2023-07-05 10:26:21 +01:00

AMDGPUMCInstLower.h

…

AMDGPUMIRFormatter.cpp

AMDGPU: Remove ImagePSV and move images to addrspace 7

2022-11-30 11:32:34 +01:00

AMDGPUMIRFormatter.h

…

AMDGPUOpenCLEnqueuedBlockLowering.cpp

[NFC] Remove Type::getInt8PtrTy (#71029)

2023-11-07 17:26:26 +01:00

AMDGPUPerfHintAnalysis.cpp

…

AMDGPUPerfHintAnalysis.h

…

AMDGPUPostLegalizerCombiner.cpp

[AMDGPU][GlobalISel] Add fdiv / sqrt to rsq combine (#78673)

2024-02-22 09:47:36 +01:00

AMDGPUPredicateControl.td

[AMDGPU][TableGen][NFC] Combine predicates without using classes. (#82346)

2024-02-21 11:45:36 +00:00

AMDGPUPreLegalizerCombiner.cpp

[AArch64][GlobalISel] Refactor Combine G_CONCAT_VECTOR (#80866)

2024-02-15 10:09:20 +00:00

AMDGPUPrintfRuntimeBinding.cpp

Replace usage of StringRef::find_last_of with a string literal of size one by the equivalent char literal

2023-11-15 15:01:36 +01:00

AMDGPUPromoteAlloca.cpp

[AMDGPU][PromoteAlloca] Correctly handle a variable vector index (#83597)

2024-03-05 08:18:17 -06:00

AMDGPUPromoteKernelArguments.cpp

[llvm] Remove uses of getWithSamePointeeType() (NFC)

2023-07-18 12:07:09 +02:00

AMDGPUPTNote.h

…

AMDGPURegBankCombiner.cpp

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)

2023-09-14 14:10:14 -07:00

AMDGPURegBankSelect.cpp

AMDGPU: Special case uniformity info for single lane workgroups

2023-06-28 07:25:48 -04:00

AMDGPURegBankSelect.h

AMDGPU/GlobalISel: Add stub custom regbankselect pass

2023-01-30 16:18:20 -04:00

AMDGPURegisterBankInfo.cpp

[LLVM] Add __builtin_readsteadycounter intrinsic and builtin for realtime clocks (#81331)

2024-02-13 10:06:25 -06:00

AMDGPURegisterBankInfo.h

[AMDGPU] Make isScalarLoadLegal a member of AMDGPURegisterBankInfo. NFC.

2024-01-09 11:53:12 +00:00

AMDGPURegisterBanks.td

[AMDGPU][True16] Don't use the VGPR_LO/HI16 register classes. (#76440)

2023-12-28 11:48:25 +00:00

AMDGPURemoveIncompatibleFunctions.cpp

[AMDGPU] Introduce GFX9/10.1/10.3/11 Generic Targets (#76955)

2024-02-12 10:18:20 +01:00

AMDGPUResourceUsageAnalysis.cpp

[Target][AMDGPU] Fix TSan error on AMDGPU Target. (#79529)

2024-01-25 21:32:37 -08:00

AMDGPUResourceUsageAnalysis.h

[Target][AMDGPU] Fix TSan error on AMDGPU Target. (#79529)

2024-01-25 21:32:37 -08:00

AMDGPURewriteOutArguments.cpp

[llvm] Stop including llvm/ADT/SmallSet.h (NFC)

2023-11-11 12:32:15 -08:00

AMDGPURewriteUndefForPHI.cpp

[AMDGPU] Do not preserve UniformityInfo (#76696)

2024-01-02 13:42:56 +05:30

AMDGPUSearchableTables.td

[AMDGPU] Add GFX12 WMMA and SWMMAC instructions (#77795)

2024-01-24 13:43:07 +01:00

AMDGPUSetWavePriority.cpp

…

AMDGPUSubtarget.cpp

[AMDGPU] Adding the amdgpu_num_work_groups function attribute (#79035)

2024-03-12 10:30:39 -07:00

AMDGPUSubtarget.h

[AMDGPU] Adding the amdgpu_num_work_groups function attribute (#79035)

2024-03-12 10:30:39 -07:00

AMDGPUTargetMachine.cpp

[AMDGPU] Add IR-level pass to rewrite away address space 7 (#77952)

2024-03-06 09:49:58 -06:00

AMDGPUTargetMachine.h

Restore "Implement convergence control in MIR using SelectionDAG (#71785)"

2024-03-06 12:19:32 +05:30

AMDGPUTargetObjectFile.cpp

[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956)

2023-12-11 21:01:36 -08:00

AMDGPUTargetObjectFile.h

…

AMDGPUTargetTransformInfo.cpp

[TTI]Fallback to SingleSrcPermute shuffle kind, if no direct estimation for

2024-02-12 07:09:49 -05:00

AMDGPUTargetTransformInfo.h

GFX12: Add LoopDataPrefetchPass (#75625)

2023-12-19 08:32:16 +01:00

AMDGPUUnifyDivergentExitNodes.cpp

[AMDGPU] Do not preserve UniformityInfo (#76696)

2024-01-02 13:42:56 +05:30

AMDGPUUnifyDivergentExitNodes.h

[llvm] Fix include guards

2023-06-13 10:47:18 +01:00

AMDGPUUnifyMetadata.cpp

…

AMDKernelCodeT.h

…

BUFInstructions.td

[AMDGPU] Remove unneeded MnemonicAlias. NFC.

2024-03-13 12:03:41 +00:00

CaymanInstructions.td

…

CMakeLists.txt

[AMDGPU] Add IR-level pass to rewrite away address space 7 (#77952)

2024-03-06 09:49:58 -06:00

DSDIRInstructions.td

AMDGPU: Copy SubtargetPredicate from pseudo for DSDIR_Real (#84057)

2024-03-05 13:49:34 -08:00

DSInstructions.td

AMDGPU: Remove incorrect uses of SubtaretPredicate around DS_Reals (#85001)

2024-03-13 09:49:30 -07:00

EvergreenInstructions.td

Use llvm::popcount instead of llvm::countPopulation(NFC)

2023-01-22 12:48:51 -08:00

EXPInstructions.td

[AMDGPU] Simplify EXP Real instruction definitions. NFC.

2024-03-07 11:04:43 +00:00

FLATInstructions.td

AMDGPU: Simplify instruction definitions for global_load_tr_b64(b128) (#83601)

2024-03-01 10:03:54 -08:00

GCNCreateVOPD.cpp

[AMDGPU] Update VOP instructions for GFX12 (#74853)

2023-12-12 11:38:24 +01:00

GCNDPPCombine.cpp

[AMDGPU] Fix warnings about unused variables [NFC]

2024-01-25 09:35:10 +01:00

GCNHazardRecognizer.cpp

AMDGPU: Refactor mfma hazard handling [NFC] (#84276)

2024-03-07 14:39:59 +05:30

GCNHazardRecognizer.h

…

GCNILPSched.cpp

Add llvm::min/max_element and use it in llvm/ and mlir/ directories. (#84678)

2024-03-10 20:00:13 -07:00

GCNIterativeScheduler.cpp

[AMDGPU] Prefer lower total register usage in regions with spilling

2024-02-26 12:19:52 -08:00

GCNIterativeScheduler.h

…

GCNMinRegStrategy.cpp

…

GCNNSAReassign.cpp

[AMDGPU] Do not run GCNNSAReassign pass for GFX12 (#78185)

2024-01-17 15:22:48 +00:00

GCNPreRALongBranchReg.cpp

[AMDGPU] Reserve SGPR pair when long branches are present

2023-06-29 16:50:46 -05:00

GCNPreRAOptimizations.cpp

…

GCNProcessors.td

[AMDGPU] Replace '.' with '-' in generic target names (#81718)

2024-02-14 15:19:04 +01:00

GCNRegPressure.cpp

[AMDGPU] Prefer lower total register usage in regions with spilling

2024-02-26 12:19:52 -08:00

GCNRegPressure.h

[AMDGPU] Prefer lower total register usage in regions with spilling

2024-02-26 12:19:52 -08:00

GCNRewritePartialRegUses.cpp

[AMDGPU] Fix GCNRewritePartialRegUses pass: vector regclass is selected instead of scalar. (#69957)

2023-11-16 16:56:46 +01:00

GCNSchedStrategy.cpp

[AMDGPU] Do not attempt to fallback to default mutations (#83208)

2024-02-27 18:04:59 -08:00

GCNSchedStrategy.h

[AMDGPU] Fix typos. NFC

2024-01-26 12:04:58 +01:00

GCNSubtarget.h

AMDGPU: Rename HasVinterInsts to HasVINTERPEncoding, NFC (#84535)

2024-03-08 10:53:28 -08:00

GCNVOPDUtils.cpp

[AMDGPU] Update VOP instructions for GFX12 (#74853)

2023-12-12 11:38:24 +01:00

GCNVOPDUtils.h

…

InstCombineTables.td

…

MIMGInstructions.td

AMDGPU: Proper use of HasImageInsts in vimage inst definitions, NFC (#83884)

2024-03-04 12:06:49 -08:00

R600.h

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)

2023-09-14 14:10:14 -07:00

R600.td

[AMDGPU][NFC] Extend PredicateControl to support True16 predicates. (#82245)

2024-02-20 11:37:44 +00:00

R600AsmPrinter.cpp

…

R600AsmPrinter.h

…

R600ClauseMergePass.cpp

…

R600ControlFlowFinalizer.cpp

…

R600Defines.h

…

R600EmitClauseMarkers.cpp

…

R600ExpandSpecialInstrs.cpp

…

R600FrameLowering.cpp

…

R600FrameLowering.h

…

R600InstrFormats.td

…

R600InstrInfo.cpp

[Target] Use *{Set,Map}::contains (NFC)

2023-03-14 18:06:55 -07:00

R600InstrInfo.h

…

R600InstrInfo.td

…

R600Instructions.td

[AMDGPU] Generic lowering for rint and nearbyint (#69596)

2023-11-14 18:49:21 +01:00

R600ISelDAGToDAG.cpp

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)

2023-09-14 14:10:14 -07:00

R600ISelLowering.cpp

[Target] Use getConstantOperandVal (NFC)

2024-01-14 00:53:29 -08:00

R600ISelLowering.h

AMDGPU: Support atomicrmw uinc_wrap/udec_wrap

2023-01-27 22:17:16 -04:00

R600MachineCFGStructurizer.cpp

…

R600MachineFunctionInfo.cpp

CodeGen: Don't lazily construct MachineFunctionInfo

2022-12-21 10:49:32 -05:00

R600MachineFunctionInfo.h

CodeGen: Don't lazily construct MachineFunctionInfo

2022-12-21 10:49:32 -05:00

R600MachineScheduler.cpp

…

R600MachineScheduler.h

…

R600MCInstLower.cpp

[NFC] Hide implementation details in anonymous namespaces

2023-01-08 17:37:02 +01:00

R600OpenCLImageTypeLoweringPass.cpp

[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956)

2023-12-11 21:01:36 -08:00

R600OptimizeVectorRegisters.cpp

[AMDGPU] Use llvm::all_of (NFC)

2024-01-30 22:12:07 -08:00

R600Packetizer.cpp

…

R600Processors.td

…

R600RegisterInfo.cpp

…

R600RegisterInfo.h

…

R600RegisterInfo.td

…

R600Schedule.td

…

R600Subtarget.cpp

AMDGPU: Clean up LDS-related occupancy calculations

2023-01-23 21:43:06 +01:00

R600Subtarget.h

…

R600TargetMachine.cpp

Fix Passing TargetOptions by Value in TargetMachines for AMDGPU (#79866)

2024-02-01 09:50:44 -08:00

R600TargetMachine.h

Fix Passing TargetOptions by Value in TargetMachines for AMDGPU (#79866)

2024-02-01 09:50:44 -08:00

R600TargetTransformInfo.cpp

[llvm][TypeSize] Fix addition/subtraction in TypeSize. (#72979)

2023-11-22 08:52:53 +00:00

R600TargetTransformInfo.h

[LV][NFC] Use ElementCount for getMaxInterleaveFactor

2023-02-22 10:15:05 +00:00

R700Instructions.td

…

SIAnnotateControlFlow.cpp

[llvm] Use Instruction::hasMetadata (NFC)

2024-01-27 22:20:22 -08:00

SIDefines.h

[AMDGPU][NFC] Have helpers to deal with encoding fields. (#82772)

2024-02-23 17:34:55 +00:00

SIFixSGPRCopies.cpp

Add llvm::min/max_element and use it in llvm/ and mlir/ directories. (#84678)

2024-03-10 20:00:13 -07:00

SIFixVGPRCopies.cpp

AMDGPU: Make SIFixVGPRCopies preserve everything

2023-07-06 10:26:21 -04:00

SIFoldOperands.cpp

Add non-null check before accessing pointer (#83459)

2024-03-07 10:31:34 +05:30

SIFormMemoryClauses.cpp

[AMDGPU] Make use of MachineInstr::all_defs and all_uses. NFCI.

2023-06-05 10:32:33 +01:00

SIFrameLowering.cpp

[AMDGPU][NFC] Have helpers to deal with encoding fields. (#82772)

2024-02-23 17:34:55 +00:00

SIFrameLowering.h

Revert "[AMDGPU] Compiler should synthesize private buffer resource descriptor from flat_scratch_init" (#81234)

2024-02-09 09:57:38 +01:00

SIInsertHardClauses.cpp

[Codegen] Make Width in getMemOperandsWithOffsetWidth a LocationSize. (#83875)

2024-03-06 17:40:13 +00:00

SIInsertWaitcnts.cpp

[AMDGPU][NFC] Refactor SIInsertWaitcnts zero waitcnt generation (#82575)

2024-02-22 15:55:26 -08:00

SIInstrFormats.td

[AMDGPU] Consolidate SGPRSpill and VGPRSpill into single Spill bit (#81901)

2024-02-16 13:32:59 -05:00

SIInstrInfo.cpp

[AMDGPU] Update LiveInterval def index for early-clobber (#79285)

2024-03-11 14:54:11 +09:00

SIInstrInfo.h

[AMDGPU] Replace isInlinableLiteral16 with specific version (#84402)

2024-03-08 14:49:52 -05:00

SIInstrInfo.td

[AMDGPU] Remove AtomicNoRet class and getAtomicNoRetOp table (#83593)

2024-03-01 17:18:55 +00:00

SIInstructions.td

[AMDGPU] Fix canonicalization of truncated values. (#83054)

2024-03-13 12:08:39 +00:00

SIISelLowering.cpp

[AMDGPU] Fix canonicalization of truncated values. (#83054)

2024-03-13 12:08:39 +00:00

SIISelLowering.h

[AMDGPU] Fix canonicalization of truncated values. (#83054)

2024-03-13 12:08:39 +00:00

SILateBranchLowering.cpp

[AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (#68186)

2023-11-06 12:30:07 +01:00

SILoadStoreOptimizer.cpp

[AMDGPU] CodeGen for GFX12 VBUFFER instructions (#75492)

2023-12-15 13:45:03 +01:00

SILowerControlFlow.cpp

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)

2023-09-14 14:10:14 -07:00

SILowerI1Copies.cpp

AMDGPU/GlobalISelDivergenceLowering: select divergent i1 phis (#80003)

2024-02-05 14:07:01 +01:00

SILowerI1Copies.h

AMDGPU/GlobalISelDivergenceLowering: select divergent i1 phis (#80003)

2024-02-05 14:07:01 +01:00

SILowerSGPRSpills.cpp

[AMDGPU] Pick available high VGPR for CSR SGPR spilling (#78669)

2024-01-24 07:08:43 +05:30

SILowerWWMCopies.cpp

Reapply "[CodeGen]Allow targets to use target specific COPY instructions for live range splitting"

2023-07-31 20:15:45 -04:00

SIMachineFunctionInfo.cpp

[AMDGPU] Adding the amdgpu_num_work_groups function attribute (#79035)

2024-03-12 10:30:39 -07:00

SIMachineFunctionInfo.h

[AMDGPU] Adding the amdgpu_num_work_groups function attribute (#79035)

2024-03-12 10:30:39 -07:00

SIMachineScheduler.cpp

Add llvm::min/max_element and use it in llvm/ and mlir/ directories. (#84678)

2024-03-10 20:00:13 -07:00

SIMachineScheduler.h

…

SIMemoryLegalizer.cpp

[AMDGPU] Handle amdgpu.last.use metadata (#83816)

2024-03-06 16:33:52 +01:00

SIModeRegister.cpp

[AMDGPU][NFC] Have helpers to deal with encoding fields. (#82772)

2024-02-23 17:34:55 +00:00

SIModeRegisterDefaults.cpp

[AMDGPU] Update IEEE and DX10_CLAMP for GFX12 (#75030)

2023-12-13 13:52:40 +01:00

SIModeRegisterDefaults.h

[AMDGPU] Update IEEE and DX10_CLAMP for GFX12 (#75030)

2023-12-13 13:52:40 +01:00

SIOptimizeExecMasking.cpp

Reapply "Convert many LivePhysRegs uses to LiveRegUnits" (#84338)

2024-03-08 19:05:00 +05:30

SIOptimizeExecMaskingPreRA.cpp

[MC] Add MCRegisterInfo::regunits for iteration over register units

2023-06-16 05:39:50 +03:00

SIOptimizeVGPRLiveRange.cpp

[AMDGPU] Skip debug instruction uses while optimizing live range of a reg in SIOptimizeVGPRLiveRange

2023-08-07 11:35:39 +05:30

SIPeepholeSDWA.cpp

[AMDGPU] Don't form sext/abs/neg fp8 cvt (#83843)

2024-03-06 10:38:20 +01:00

SIPostRABundler.cpp

[MC] Add MCRegisterInfo::regunits for iteration over register units

2023-06-16 05:39:50 +03:00

SIPreAllocateWWMRegs.cpp

[CodeGen] Do not pass MF into MachineRegisterInfo methods. NFC. (#84770)

2024-03-11 15:35:05 +00:00

SIPreEmitPeephole.cpp

[AMDGPU] Use MachineBasicBlock::instrs (NFC)

2024-01-28 10:47:07 -08:00

SIProgramInfo.cpp

[AMDGPU] Update IEEE and DX10_CLAMP for GFX12 (#75030)

2023-12-13 13:52:40 +01:00

SIProgramInfo.h

[AMDGPU] Update IEEE and DX10_CLAMP for GFX12 (#75030)

2023-12-13 13:52:40 +01:00

SIRegisterInfo.cpp

[AMDGPU] Use a consistent DwarfEH register flavour (#84513)

2024-03-11 10:36:38 -04:00

SIRegisterInfo.h

[CodeGen] Make some includes explicit (NFC)

2023-11-24 14:43:18 +01:00

SIRegisterInfo.td

[AMDGPU] Fix decoder for BF16 inline constants (#82276)

2024-02-19 13:45:23 -08:00

SISchedule.td

AMDGPU: Correct cycle counts for f64 mfma on gfx940 (#83782)

2024-03-06 09:36:01 +05:30

SIShrinkInstructions.cpp

AMDGPU/NFC: Remove some bits from TSFlags (#81525)

2024-02-12 16:43:48 -05:00

SIWholeQuadMode.cpp

[AMDGPU] Add VDSDIR instructions for GFX12 (#75197)

2024-01-03 16:32:00 +01:00

SMInstructions.td

[AMDGPU] Remove AtomicNoRet class and getAtomicNoRetOp table (#83593)

2024-03-01 17:18:55 +00:00

SOPInstructions.td

AMDGPI: Rename HasExpOrExportInsts to HasExportInsts. NFC (#84252)

2024-03-06 14:59:28 -08:00

VIInstrFormats.td

…

VINTERPInstructions.td

AMDGPU: Rename HasVinterInsts to HasVINTERPEncoding, NFC (#84535)

2024-03-08 10:53:28 -08:00

VOP1Instructions.td

AMDGPU: Copy SubtargetPredicate from pseudo to real for dpp16 and dpp8 (#84517)

2024-03-08 10:30:01 -08:00

VOP2Instructions.td

[AMDGPU][True16] Make NotHasTrue16BitInsts a True16Predicate (#84771)

2024-03-11 13:58:45 -04:00

VOP3Instructions.td

[GlobalISel][AMDGPU] Import patterns with multiple defs (#84171)

2024-03-08 09:39:10 +01:00

VOP3PInstructions.td

[AMDGPU] Replace isInlinableLiteral16 with specific version (#84402)

2024-03-08 14:49:52 -05:00

VOPCInstructions.td

[AMDGPU][True16] Make NotHasTrue16BitInsts a True16Predicate (#84771)

2024-03-11 13:58:45 -04:00

VOPDInstructions.td

[AMDGPU] Update VOP instructions for GFX12 (#74853)

2023-12-12 11:38:24 +01:00

VOPInstructions.td

AMDGPU: Copy SubtargetPredicate from pseudo to real for dpp16 and dpp8 (#84517)

2024-03-08 10:30:01 -08:00