Kazu Hirata 2833760c57 [Target] Qualify auto in range-based for loops (NFC)

2022-08-28 17:35:09 -07:00

..

AsmParser

Cleanup MCParser headers

2022-02-11 10:39:29 +01:00

Disassembler

Rename MCFixedLenDisassembler.h as MCDecoderOps.h

2022-05-15 08:44:58 +08:00

MCTargetDesc

[CodeGen] Move instruction predicate verification to emitInstruction

2022-07-14 09:33:28 +01:00

TargetInfo

Fix shlib builds for all lib/Target/*/TargetInfo libs

2021-10-08 15:21:13 -07:00

CMakeLists.txt

[VE] LEGALAVL and staged VVP legalization

2022-02-02 09:11:41 +01:00

LVLGen.cpp

[Target] Use range-based for loops (NFC)

2022-01-23 22:53:15 -08:00

VE.h

[VE][NFC] Remove obsoleted function declaration

2022-06-19 13:33:46 +09:00

VE.td

…

VEAsmPrinter.cpp

[VE] Support inlineasm memory operand

2022-08-23 13:44:03 +09:00

VECallingConv.td

…

VECustomDAG.cpp

[llvm] Use value_or instead of getValueOr (NFC)

2022-06-18 23:07:11 -07:00

VECustomDAG.h

[VE] v512|256 f32|64 fneg isel and tests

2022-03-16 11:31:26 +01:00

VEFrameLowering.cpp

…

VEFrameLowering.h

Revert "Rename llvm::array_lengthof into llvm::size to match std::size from C++17"

2022-01-26 16:55:53 +01:00

VEInstrBuilder.h

…

VEInstrFormats.td

…

VEInstrInfo.cpp

[VE] Support load/store/spill of vector mask registers

2022-07-19 10:29:21 +09:00

VEInstrInfo.h

…

VEInstrInfo.td

[VE] Change displacement type in MEM..i from i32 to i64

2022-07-07 09:33:49 -07:00

VEInstrIntrinsicVL.gen.td

[VE] Support more intrinsics

2022-03-14 19:17:15 +09:00

VEInstrIntrinsicVL.td

[VE] Support more intrinsics

2022-03-14 19:17:15 +09:00

VEInstrPatternsVec.td

[VE] Support load/store/spill of vector mask registers

2022-07-19 10:29:21 +09:00

VEInstrVec.td

[VE] Support load/store/spill of vector mask registers

2022-07-19 10:29:21 +09:00

VEISelDAGToDAG.cpp

[VE] Support inlineasm memory operand

2022-08-23 13:44:03 +09:00

VEISelLowering.cpp

[Target] Qualify auto in range-based for loops (NFC)

2022-08-28 17:35:09 -07:00

VEISelLowering.h

[X86] Promote i8/i16 CTTZ (BSF) instructions and remove speculation branch

2022-08-24 17:28:18 +01:00

VEMachineFunctionInfo.cpp

llvm-reduce: Add cloning of target MachineFunctionInfo

2022-06-07 10:14:48 -04:00

VEMachineFunctionInfo.h

llvm-reduce: Add cloning of target MachineFunctionInfo

2022-06-07 10:14:48 -04:00

VEMCInstLower.cpp

[Target] Use range-based for loops (NFC)

2022-01-23 22:53:15 -08:00

VERegisterInfo.cpp

[RegisterInfoEmitter] Generate isConstantPhysReg(). NFCI

2022-08-24 14:16:20 +00:00

VERegisterInfo.h

[RegisterInfoEmitter] Generate isConstantPhysReg(). NFCI

2022-08-24 14:16:20 +00:00

VERegisterInfo.td

[RegisterInfoEmitter] Generate isConstantPhysReg(). NFCI

2022-08-24 14:16:20 +00:00

VESubtarget.cpp

Move TargetRegistry.(h|cpp) from Support to MC

2021-10-08 14:51:48 -07:00

VESubtarget.h

Remove redundant void arguments (NFC)

2022-01-02 10:20:19 -08:00

VETargetMachine.cpp

[llvm] Use value_or instead of getValueOr (NFC)

2022-06-18 23:07:11 -07:00

VETargetMachine.h

mark getTargetTransformInfo and getTargetIRAnalysis as const

2022-02-25 14:30:44 -05:00

VETargetTransformInfo.h

[VE] v256i32|64 reduction isel and tests

2022-03-14 11:10:38 +01:00

VVPInstrInfo.td

[VE] v512|256 f32|64 fneg isel and tests

2022-03-16 11:31:26 +01:00

VVPInstrPatternsVec.td

[VE] v512|256 f32|64 fneg isel and tests

2022-03-16 11:31:26 +01:00

VVPISelLowering.cpp

[llvm] Use value instead of getValue (NFC)

2022-07-13 23:11:56 -07:00

VVPNodes.def

[VE] v512|256 f32|64 fneg isel and tests

2022-03-16 11:31:26 +01:00