Ramkumar Ramachandra 3b9f9645e0

[LV] Regen a couple of tests with UTC (#127785)

2025-02-20 15:27:51 +00:00

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exit-branch-cost.ll

[VPlan] Add incoming values for all predecessor to ResumePHI (NFCI).

2025-02-09 11:20:20 +00:00

interleave_IC.ll

[LV] Remove unused configuration option (#82955)

2024-02-28 10:17:25 -08:00

interleaved-pointer-runtime-check-unprofitable.ll

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large-loop-rdx.ll

[LV] Regen a couple of tests with UTC (#127785)

2025-02-20 15:27:51 +00:00

lit.local.cfg

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massv-altivec.ll

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massv-calls.ll

[Analysis] atan2: isTriviallyVectorizable; add to massv and accelerate veclibs (#113637)

2024-11-08 16:07:38 -08:00

massv-nobuiltin.ll

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massv-unsupported.ll

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optimal-epilog-vectorization-profitability.ll

[LV] Vectorize Epilogues for loops with small VF but high IC (#108190)

2024-11-17 19:35:32 +00:00

optimal-epilog-vectorization.ll

[VPlan] Add incoming values for all predecessor to ResumePHI (NFCI).

2025-02-09 11:20:20 +00:00

pr30990.ll

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pr41179.ll

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predcost.ll

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reg-usage.ll

[LV] Change loops' interleave count computation (#73766)

2024-01-04 12:45:22 +05:30

small-loop-rdx.ll

[LV] Regen a couple of tests with UTC (#127785)

2025-02-20 15:27:51 +00:00

stride-vectorization.ll

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vectorize-bswap.ll

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vectorize-force-tail-with-evl.ll

[LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (#76172)

2024-04-04 18:30:17 -04:00

vectorize-only-for-real.ll

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vplan-force-tail-with-evl.ll

[VPlan] Modernize VPWidenIntOrFpInductionRecipe printing (NFC).

2024-12-15 20:46:52 +00:00

vsx-tsvc-s173.ll

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widened-massv-call.ll

[VPlan] Propagate all GEP flags (#119899)

2024-12-17 13:48:50 +01:00

widened-massv-vfabi-attr.ll

Prefer use of 0.0 over -0.0 for fadd reductions w/nsz (in IR) (#106770)

2024-09-03 09:16:37 -07:00