Sander de Smalen 9b5f19714c [AArch64][SME2/SVE2p1] Add predicate-as-counter intrinsics for pext (multi)
These intrinsics are used to implement the pext intrinsics that extract
two predicates (mask) from a predicate-as-counter value, e.g.

  __attribute__((arm_streaming))
   svboolx2_t svpext_lane_c8_x2(svcount_t pnn, uint64_t imm);

As described in https://github.com/ARM-software/acle/pull/217

Reviewed By: kmclaughlin

Differential Revision: https://reviews.llvm.org/D150442
2023-05-16 14:04:16 +00:00
..
2022-06-07 18:57:59 +01:00
2023-01-03 15:09:29 +00:00
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2023-03-23 20:20:20 -07:00
2023-01-24 22:36:39 +01:00
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2023-02-22 09:17:25 +00:00

++ SVE CodeGen Warnings ++

When the WARN check lines fail in the SVE codegen tests it most likely means you
have introduced a warning due to:
1. Adding an invalid call to VectorType::getNumElements() or EVT::getVectorNumElements()
   when the type is a scalable vector.
2. Relying upon an implicit cast conversion from TypeSize to uint64_t.

For generic code, please modify your code to work with ElementCount and TypeSize directly.
For target-specific code that only deals with fixed-width vectors, use the fixed-size interfaces.
Please refer to the code where those functions live for more details.