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Durgadoss R 3b5e9eed2f
[NVPTX] Add float to tf32 conversion intrinsics (#124316) 
This patch adds the set of f32 -> tf32 cvt intrinsics introduced
in sm100 with ptx8.6. This builds on top of the recent PR #121507.

Tests are verified with a 12.8 ptxas executable.

PTX ISA link:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cvt

Signed-off-by: Durgadoss R <durgadossr@nvidia.com>
2025-01-27 15:52:43 +05:30
..
access-non-generic.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
activemask.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
add-sub-128bit.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
addr-mode.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
addrspacecast-cse.ll
[SDAG] Fix CSE for ADDRSPACECAST nodes (#122912)
2025-01-20 09:09:22 -08:00
addrspacecast-gvar.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
addrspacecast.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
aggr-param.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
aggregate-return.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
alias-errors.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
alias.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
annotations.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
anonymous-fn-param.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
APIntLoadStore.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
APIntParam.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
APIntSextParam.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
APIntZextParam.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
arg-lowering.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
arithmetic-fp-sm20.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
arithmetic-int.ll
[NVPTX] Add some more immediate instruction variants (#122746)
2025-01-14 21:28:29 -08:00
async-copy.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
atomic-lower-local.ll
…
atomicrmw-expand.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
atomics-sm60.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
atomics-sm70.ll
[NVPTX] Stop using 16-bit CAS instructions from PTX (#120220)
2025-01-22 19:37:11 -08:00
atomics-sm90.ll
[NVPTX] Stop using 16-bit CAS instructions from PTX (#120220)
2025-01-22 19:37:11 -08:00
atomics-with-scope.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
atomics.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
b52037.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
barrier.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
bf16-instructions.ll
[NVPTX] Select bfloat16 add/mul/sub as fma on SM80 (#121065)
2025-01-16 14:53:24 +00:00
bf16.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
bf16x2-instructions-approx.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
bf16x2-instructions.ll
[NVPTX] Select bfloat16 add/mul/sub as fma on SM80 (#121065)
2025-01-16 14:53:24 +00:00
bfe.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
boolean-patterns.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
branch-fold.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
branch-fold.mir
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
brkpt.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
bswap.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
bug17709.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
bug21465.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
bug22246.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
bug22322.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
bug26185-2.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
bug26185.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
bug41651.ll
…
bug52623.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
bypass-div.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
call_bitcast_byval.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
call-with-alloca-buffer.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
callchain.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
calling-conv.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
calls-with-phi.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
chain-different-as.ll
[NVPTX] Avoid introducing unnecessary ProxyRegs and Movs in ISel (#120486)
2024-12-19 07:55:03 -08:00
cluster-dim.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
cmpxchg.ll
[NVPTX] Stop using 16-bit CAS instructions from PTX (#120220)
2025-01-22 19:37:11 -08:00
combine-mad.ll
[NVPTX] Remove NVPTX::IMAD opcode, and rely on intruction selection only (#121724)
2025-01-15 20:09:18 +00:00
combine-min-max.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
common-linkage.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
compare-int.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
compute-ptx-value-vts.ll
[NVPTX] Avoid introducing unnecessary ProxyRegs and Movs in ISel (#120486)
2024-12-19 07:55:03 -08:00
constant-vectors.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
convergent-mir-call.ll
…
convert-call-to-indirect.ll
[NVPTX] Verify ptx in the right version
2024-09-17 10:40:21 +02:00
convert-fp.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
convert-int-sm20.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
convert-sm80.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
convert-sm89.ll
[NVPTX] Add float to tf32 conversion intrinsics (#121507)
2025-01-13 16:17:42 +05:30
convert-sm90.ll
[NVPTX] Add float to tf32 conversion intrinsics (#121507)
2025-01-13 16:17:42 +05:30
convert-sm100.ll
[NVPTX] Add float to tf32 conversion intrinsics (#124316)
2025-01-27 15:52:43 +05:30
copysign.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
cp-async-bulk-tensor-g2s.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
cp-async-bulk-tensor-prefetch.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
cp-async-bulk-tensor-reduce.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
cp-async-bulk-tensor-s2g.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
cp-async-bulk.ll
[NVPTX] Add Bulk Copy Prefetch Intrinsics (#123226)
2025-01-23 16:49:44 +05:30
ctlz.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
ctpop.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
cttz.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
dag-cse.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
demote-vars.ll
[NVPTX] Avoid introducing unnecessary ProxyRegs and Movs in ISel (#120486)
2024-12-19 07:55:03 -08:00
disable-opt.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
disjoint-or-addr.ll
[NVPTX] Support address offsets added with disjoint or (#122042)
2025-01-08 14:11:23 -08:00
div-ri.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
div.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
divrem-combine.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
dot-product.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
dynamic_stackalloc.ll
[NVPTX] Remove NVPTX::IMAD opcode, and rely on intruction selection only (#121724)
2025-01-15 20:09:18 +00:00
dynamic-stackalloc-regression.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
elect.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
empty-type.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
envreg.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
extloadv.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
extractelement.ll
[NVPTX] Avoid introducing unnecessary ProxyRegs and Movs in ISel (#120486)
2024-12-19 07:55:03 -08:00
f16-abs.ll
[NVPTX] Add support for f16 fabs (#116107)
2024-11-18 13:47:08 -08:00
f16-ex2.ll
[NVPTX] Improve support for {ex2,lg2}.approx (#120519)
2025-01-16 12:21:32 -08:00
f16-instructions.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
f16x2-instructions.ll
[NVPTX] Avoid introducing unnecessary ProxyRegs and Movs in ISel (#120486)
2024-12-19 07:55:03 -08:00
f32-ex2.ll
[NVPTX] Improve support for {ex2,lg2}.approx (#120519)
2025-01-16 12:21:32 -08:00
f32-lg2.ll
[NVPTX] Fix failing test and incorrect mcpu reading in reflect
2025-01-21 13:25:04 -06:00
fast-math.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
fcos-no-fast-math.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
fence-proxy-tensormap.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
fence-sm-90.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
fence.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
fexp2.ll
[NVPTX] Improve support for {ex2,lg2}.approx (#120519)
2025-01-16 12:21:32 -08:00
filetype-null.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
flo.ll
[NVPTX] Add support for nvvm.flo.[us] intrinsics (#114489)
2024-11-01 16:35:43 -07:00
flog2.ll
[NVPTX] Improve support for {ex2,lg2}.approx (#120519)
2025-01-16 12:21:32 -08:00
fma-assoc.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
fma-disable.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
fma-relu-contract.ll
[NVPTX] Select bfloat16 add/mul/sub as fma on SM80 (#121065)
2025-01-16 14:53:24 +00:00
fma-relu-fma-intrinsic.ll
[NVPTX] Select bfloat16 add/mul/sub as fma on SM80 (#121065)
2025-01-16 14:53:24 +00:00
fma-relu-instruction-flag.ll
[NVPTX] Select bfloat16 add/mul/sub as fma on SM80 (#121065)
2025-01-16 14:53:24 +00:00
fma.ll
[NVPTX] Add some more immediate instruction variants (#122746)
2025-01-14 21:28:29 -08:00
fminimum-fmaximum.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
fns.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
fp16.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
fp-contract.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
fp-literals.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
fsin-no-fast-math.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
function-align.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
funnel-shift-clamp.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
generic-to-nvvm-ir.ll
…
generic-to-nvvm.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
global-addrspace.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
global-ctor-empty.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
global-ctor.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
global-dtor.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
global-incomplete-init.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
global-ordering.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
global-variable-big.ll
[test] Fix check prefixes
2024-05-13 14:01:00 -07:00
global-visibility.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
globals_init.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
globals_lowering.ll
…
griddepcontrol.ll
[LLVM][NVPTX] Add support for griddepcontrol instruction (#123511)
2025-01-24 09:33:16 +05:30
gvar-init.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
half.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
i1-array-global.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
i1-ext-load.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
i1-global.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
i1-icmp.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
i1-int-to-fp.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
i1-load-lower.ll
[NVPTX] Avoid introducing unnecessary ProxyRegs and Movs in ISel (#120486)
2024-12-19 07:55:03 -08:00
i1-param.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
i8-param.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
i8x2-instructions.ll
[NVPTX][NFC] Regenerate some tests checks (#116605)
2024-11-18 18:35:44 +00:00
i8x4-instructions.ll
[NVPTX] Avoid introducing unnecessary ProxyRegs and Movs in ISel (#120486)
2024-12-19 07:55:03 -08:00
i16x2-instructions.ll
[NVPTX] Avoid introducing unnecessary ProxyRegs and Movs in ISel (#120486)
2024-12-19 07:55:03 -08:00
i128-array.ll
[NVPTX] Fix segfault with i128 types in arrays (#120562)
2025-01-13 12:49:34 -08:00
i128-global.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
i128-param.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
i128-retval.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
i128-struct.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
i128.ll
[NVPTX] Remove NVPTX::IMAD opcode, and rely on intruction selection only (#121724)
2025-01-15 20:09:18 +00:00
idioms.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
imad.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
indirect_byval.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
inline-asm-b128-test1.ll
[NVPTX] Avoid introducing unnecessary ProxyRegs and Movs in ISel (#120486)
2024-12-19 07:55:03 -08:00
inline-asm-b128-test2.ll
[NVPTX] Avoid introducing unnecessary ProxyRegs and Movs in ISel (#120486)
2024-12-19 07:55:03 -08:00
inline-asm-b128-test3.ll
[NVPTX] Avoid introducing unnecessary ProxyRegs and Movs in ISel (#120486)
2024-12-19 07:55:03 -08:00
inline-asm.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
inlineasm-output-template.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
intr-range.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
intrinsic-old.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
intrinsics-sm90.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
intrinsics.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
isspacep.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
jump-table.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
kernel-param-align.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
ld-addrspace.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
ld-generic.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
ld-st-addrrspace.py
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
ldg-invariant.ll
[NVPTX] Generalize and extend upsizing when lowering 8/16-bit-element vector loads/stores (#119622)
2024-12-17 15:23:22 -08:00
ldparam-v4.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
ldu-i8.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
ldu-ldg.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
ldu-reg-plus-offset.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
lit.local.cfg
…
load-sext-i1.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
load-store-scalars.ll
[NVPTX] Generalize and extend upsizing when lowering 8/16-bit-element vector loads/stores (#119622)
2024-12-17 15:23:22 -08:00
load-store-sm-70.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
load-store-sm-90.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
load-store-vectors.ll
[NVPTX] Generalize and extend upsizing when lowering 8/16-bit-element vector loads/stores (#119622)
2024-12-17 15:23:22 -08:00
load-with-non-coherent-cache.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
LoadStoreVectorizer.ll
[NVPTX] Generalize and extend upsizing when lowering 8/16-bit-element vector loads/stores (#119622)
2024-12-17 15:23:22 -08:00
local-stack-frame.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
loop-vectorize.ll
…
lower-aggr-copies.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
lower-alloca.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
lower-args-gridconstant.ll
[NVPTX] Support address offsets added with disjoint or (#122042)
2025-01-08 14:11:23 -08:00
lower-args.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
lower-byval-args.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
lower-ctor-dtor.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
lower-kernel-ptr-arg.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
machine-sink.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
MachineSink-call.ll
…
MachineSink-convergent.ll
…
managed.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
match.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
math-intrins-sm53-ptx42.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
math-intrins-sm80-ptx70-autoupgrade.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
math-intrins-sm80-ptx70-instcombine.ll
…
math-intrins-sm80-ptx70.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
math-intrins-sm86-ptx72-autoupgrade.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
math-intrins-sm86-ptx72.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
math-intrins.ll
[NVPTX] Avoid introducing unnecessary ProxyRegs and Movs in ISel (#120486)
2024-12-19 07:55:03 -08:00
max-align.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
maxclusterrank.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
mbarrier.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
minmax-negative.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
misaligned-vector-ldst.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
misched_func_call.ll
[NVPTX] Avoid introducing unnecessary ProxyRegs and Movs in ISel (#120486)
2024-12-19 07:55:03 -08:00
mma-no-sink-after-laneid-check.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
module-inline-asm.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
mulhi-intrins.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
mulwide.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
naked-fn-with-frame-pointer.ll
[llvm] Consistently respect naked fn attribute in TargetFrameLowering::hasFP() (#106014)
2024-10-18 09:35:42 +04:00
named-barriers.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
nanosleep.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
no-extra-parens.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
noduplicate-syncthreads.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
nofunc.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
noreturn.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
nounroll.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
nvcl-param-align.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
nvptx-aa.ll
[NVPTX][AA] Traverse use-def chain to find non-generic addrspace (#106477)
2024-08-29 21:26:58 -07:00
nvvm-annotations-D120129.ll
…
nvvm-reflect-arch-O0.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
nvvm-reflect-arch.ll
[NVPTX] Fix failing test and incorrect mcpu reading in reflect
2025-01-21 13:25:04 -06:00
nvvm-reflect-module-flag.ll
…
nvvm-reflect-ocl.ll
[NVPTX] Fix failing test and incorrect mcpu reading in reflect
2025-01-21 13:25:04 -06:00
nvvm-reflect-opaque.ll
[NVPTX] Do not run the NVVMReflect pass as part of the normal pipeline (#121834)
2025-01-07 14:45:03 -06:00
nvvm-reflect.ll
[NVPTX] Do not run the NVVMReflect pass as part of the normal pipeline (#121834)
2025-01-07 14:45:03 -06:00
packed-aggr.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
param-add.ll
[NVPTX] Attempt to load params using symbol addition node directly (#119935)
2025-01-13 12:58:37 -08:00
param-align.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
param-load-store.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
param-overalign.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
param-vectorize-device.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
param-vectorize-kernel.ll
…
pass-name.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
pow2_mask_cmp.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
pr13291-i1-store.ll
[NVPTX] Avoid introducing unnecessary ProxyRegs and Movs in ISel (#120486)
2024-12-19 07:55:03 -08:00
pr16278.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
pr17529.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
proxy-reg-erasure-ptx.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
proxy-reg-erasure.mir
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
rcp-opt.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
read-global-variable-constant.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
redux-sync.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
refl1.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
reg-copy.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
reg-types.ll
[NVPTX] Avoid introducing unnecessary ProxyRegs and Movs in ISel (#120486)
2024-12-19 07:55:03 -08:00
rotate_64.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
rotate.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
rsqrt-opt.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
rsqrt.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
sad-intrins.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
sched1.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
sched2.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
setmaxnreg.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
sext-in-reg.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
sext-params.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
sext-setcc.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
shfl-p.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
shfl-sync-p.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
shfl-sync.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
shfl.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
shift-parts.ll
[NVPTX] Add some more immediate instruction variants (#122746)
2025-01-14 21:28:29 -08:00
short-ptr.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
shuffle-vec-undef-init.ll
[NVPTX] Generalize and extend upsizing when lowering 8/16-bit-element vector loads/stores (#119622)
2024-12-17 15:23:22 -08:00
simple-call.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
sm-version.ll
[NVPTX] Add SM versions for 101 and 120 (#124155)
2025-01-24 16:39:52 +05:30
speculative-execution-divergent-target.ll
…
sqrt-approx.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
st-addrspace.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
st-generic.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
st-param-imm.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
stacksaverestore.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
store-retval.ll
…
store-undef.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
surf-read-cuda.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
surf-read.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
surf-tex.py
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
surf-write-cuda.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
surf-write.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
symbol-naming.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
TailDuplication-convergent.ll
…
tex-read-cuda.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
tex-read.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
texsurf-queries.ll
[NVPTX] Aggressively try to replace image handles with references (#119730)
2024-12-16 11:53:30 -08:00
tid-range.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
unaligned-param-load-store.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
unfold-masked-merge-vector-variablemask.ll
[NVPTX] Avoid introducing unnecessary ProxyRegs and Movs in ISel (#120486)
2024-12-19 07:55:03 -08:00
unreachable.ll
[NVPTX] Switch front-ends and tests to ptx_kernel cc (#120806)
2025-01-07 18:24:50 -08:00
vaargs.ll
[NVPTX] Avoid introducing unnecessary ProxyRegs and Movs in ISel (#120486)
2024-12-19 07:55:03 -08:00
variadics-backend.ll
[NVPTX] Support address offsets added with disjoint or (#122042)
2025-01-08 14:11:23 -08:00
variadics-lowering.ll
[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)
2024-11-06 11:53:33 +00:00
vec8.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
vec-param-load.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
vector-args.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
vector-call.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
vector-compare.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
vector-global.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
vector-loads.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
vector-returns.ll
[NVPTX] Avoid introducing unnecessary ProxyRegs and Movs in ISel (#120486)
2024-12-19 07:55:03 -08:00
vector-select.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
vector-stores.ll
[NVPTX] Generalize and extend upsizing when lowering 8/16-bit-element vector loads/stores (#119622)
2024-12-17 15:23:22 -08:00
vectorize-misaligned.ll
…
vote.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
weak-global.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
weak-linkage.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
wgmma-sm90a-fence.ll
[NVPTX] Add intrinsics for wgmma.fence PTX instructions (#120523)
2024-12-20 15:25:06 -05:00
wmma-ptx60-sm70.py
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
wmma-ptx61-sm70.py
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
wmma-ptx63-sm72.py
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
wmma-ptx63-sm75.py
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
wmma-ptx64-sm70.py
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
wmma-ptx65-sm75.py
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
wmma-ptx71-sm80.py
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00
wmma.py
…
zeroext-32bit.ll
[NVPTX,test] Change llc -march= to -mtriple=
2024-12-15 10:45:11 -08:00