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llvm-project/llvm/lib/Target/AMDGPU
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Austin Kerbow 62bcfcb5a5 [AMDGPU] Add llvm.amdgcn.s.setprio intrinsic 
Reviewed By: rampitec, arsenm

Differential Revision: https://reviews.llvm.org/D120976
2022-03-12 22:15:42 -08:00
..
AsmParser
[AMDGPU] Add gfx10 assembler directive to specify shared VGPR count
2022-03-07 14:27:41 -08:00
Disassembler
Cleanup LLVMMC headers
2022-02-09 11:09:17 +01:00
MCA
[llvm] Use = default (NFC)
2022-02-06 22:18:35 -08:00
MCTargetDesc
[AMDGPU] Add gfx10 assembler directive to specify shared VGPR count
2022-03-07 14:27:41 -08:00
TargetInfo
Fix shlib builds for all lib/Target/*/TargetInfo libs
2021-10-08 15:21:13 -07:00
Utils
AMDGPU: Set up User SGPRs for queue_ptr only when necessary
2022-03-09 10:14:05 -08:00
AMDGPU.h
Cleanup header dependencies in LLVMCore
2022-02-02 06:54:20 +01:00
AMDGPU.td
[AMDGPU] Remove HasAtomicFaddInstsGFX90X and HasAtomicFaddInstsGFX940
2022-03-09 18:02:21 +00:00
AMDGPUAliasAnalysis.cpp
[NFC][AMDGPU] Reduce includes dependencies, part 2
2021-10-01 17:50:20 +03:00
AMDGPUAliasAnalysis.h
[Target] Remove redundant member initialization (NFC)
2022-01-06 22:01:44 -08:00
AMDGPUAlwaysInlinePass.cpp
[HIP] [AlwaysInliner] Disable AlwaysInliner to eliminate undefined symbols
2021-10-18 16:53:15 -06:00
AMDGPUAnnotateKernelFeatures.cpp
[AMDGPU][NFC] Correct typos in lib/Target/AMDGPU/AMDGPU*.cpp files. Test commit for new contributor.
2021-09-20 14:48:50 -07:00
AMDGPUAnnotateUniformValues.cpp
[AMDGPU] Return better Changed status from AMDGPUAnnotateUniformValues
2022-02-17 09:31:42 +00:00
AMDGPUArgumentUsageInfo.cpp
AMDGPU: Remove fixed function ABI option
2021-12-10 19:41:19 -05:00
AMDGPUArgumentUsageInfo.h
…
AMDGPUAsmPrinter.cpp
Revert "Cleanup codegen includes"
2022-03-10 07:59:22 -05:00
AMDGPUAsmPrinter.h
[AMDGPU] Lazily init pal metadata on first function
2022-02-04 18:39:35 +01:00
AMDGPUAtomicOptimizer.cpp
[AMDGPU][NFC] Correct typos in lib/Target/AMDGPU/AMDGPU*.cpp files. Test commit for new contributor.
2021-09-20 14:48:50 -07:00
AMDGPUAttributes.def
[AMDGPU][NFC]: Emit metadata for hidden_heap_v1 kernarg
2022-02-25 10:45:35 -08:00
AMDGPUAttributor.cpp
AMDGPU: Set up User SGPRs for queue_ptr only when necessary
2022-03-09 10:14:05 -08:00
AMDGPUCallingConv.td
[AMDGPU] Move call clobbered return address registers s[30:31] to callee saved range
2022-03-09 12:18:02 +05:30
AMDGPUCallLowering.cpp
Revert "Cleanup codegen includes"
2022-03-10 07:59:22 -05:00
AMDGPUCallLowering.h
AMDGPU/GlobalISel: Redo kernel argument load handling
2021-07-16 08:56:54 -04:00
AMDGPUCodeGenPrepare.cpp
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
AMDGPUCombine.td
AMDGPU/GlobalISel: Add clamp combine
2021-12-03 12:49:39 +01:00
AMDGPUCombinerHelper.cpp
[AMDGPU][GlobalISel] Fix insert point in FoldableFneg combine
2022-02-11 12:09:40 +01:00
AMDGPUCombinerHelper.h
[AMDGPU][GlobalISel] Fold G_FNEG above when users cannot fold mods
2021-11-17 14:25:13 +01:00
AMDGPUCtorDtorLowering.cpp
[amdgpu] Don't crash on empty global ctor/dtor
2021-11-16 14:36:08 +00:00
AMDGPUExportClustering.cpp
[llvm] Use = default (NFC)
2022-02-06 22:18:35 -08:00
AMDGPUExportClustering.h
…
AMDGPUFeatures.td
AMDGPU: Remove FeatureLocalMemorySize0
2021-09-02 22:43:01 -04:00
AMDGPUFixFunctionBitcasts.cpp
Revert "AMDGPU: Remove AMDGPUFixFunctionBitcasts pass"
2021-12-16 21:21:32 +00:00
AMDGPUFrameLowering.cpp
…
AMDGPUFrameLowering.h
…
AMDGPUGenRegisterBankInfo.def
…
AMDGPUGISel.td
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
AMDGPUGlobalISelUtils.cpp
…
AMDGPUGlobalISelUtils.h
[ADT] Move DenseMapInfo for ArrayRef/StringRef into respective headers (NFC)
2021-06-03 18:34:36 +02:00
AMDGPUHSAMetadataStreamer.cpp
AMDGPU: Set up User SGPRs for queue_ptr only when necessary
2022-03-09 10:14:05 -08:00
AMDGPUHSAMetadataStreamer.h
[llvm] Use = default (NFC)
2022-02-06 22:18:35 -08:00
AMDGPUInstCombineIntrinsic.cpp
[AMDGPU] Only match correct type for a16
2022-01-25 14:59:16 +01:00
AMDGPUInstrInfo.cpp
…
AMDGPUInstrInfo.h
[AMDGPU] Fix LOD bias in A16 combine
2022-01-21 12:09:06 +01:00
AMDGPUInstrInfo.td
[AMDGPU] Move call clobbered return address registers s[30:31] to callee saved range
2022-03-09 12:18:02 +05:30
AMDGPUInstructions.td
[AMDGPU] Select no-return ds_* atomic ops in tblgen.
2022-02-10 09:26:37 +05:30
AMDGPUInstructionSelector.cpp
Revert "Cleanup codegen includes"
2022-03-10 07:59:22 -05:00
AMDGPUInstructionSelector.h
AMDGPU/GlobalISel: Introduce pseudo to copy sp in call sequences
2022-01-19 10:13:31 -05:00
AMDGPUISelDAGToDAG.cpp
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
AMDGPUISelDAGToDAG.h
[AMDGPU] Implement widening multiplies with v_mad_i64_i32/v_mad_u64_u32
2021-11-24 11:25:02 +00:00
AMDGPUISelLowering.cpp
Revert "Cleanup codegen includes"
2022-03-10 07:59:22 -05:00
AMDGPUISelLowering.h
[AMDGPU] Move call clobbered return address registers s[30:31] to callee saved range
2022-03-09 12:18:02 +05:30
AMDGPULateCodeGenPrepare.cpp
[AArch64, AMDGPU] Use make_early_inc_range (NFC)
2021-11-03 09:22:51 -07:00
AMDGPULegalizerInfo.cpp
[AMDGPU] new gfx940 fp atomics
2022-03-07 12:32:02 -08:00
AMDGPULegalizerInfo.h
[AMDGPU] Add a new intrinsic to control fp_trunc rounding mode
2022-02-11 12:08:23 -05:00
AMDGPULibCalls.cpp
[AMDGPU] Pull out repeated getVecSize() calls. NFC.
2022-02-10 16:31:36 +00:00
AMDGPULibFunc.cpp
Revert "Rename llvm::array_lengthof into llvm::size to match std::size from C++17"
2022-01-26 16:55:53 +01:00
AMDGPULibFunc.h
[llvm] Use = default (NFC)
2022-02-06 22:18:35 -08:00
AMDGPULowerIntrinsics.cpp
[AArch64, AMDGPU] Use make_early_inc_range (NFC)
2021-11-03 09:22:51 -07:00
AMDGPULowerKernelArguments.cpp
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
AMDGPULowerKernelAttributes.cpp
[AMDGPU] Fix pass name of AMDGPULowerKernelAttributes. NFC.
2021-07-06 15:03:31 -07:00
AMDGPULowerModuleLDSPass.cpp
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
AMDGPUMachineCFGStructurizer.cpp
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
AMDGPUMachineFunction.cpp
[Target] Remove redundant member initialization (NFC)
2022-01-06 22:01:44 -08:00
AMDGPUMachineFunction.h
[Target] Remove unused forward declarations (NFC)
2022-01-02 10:20:15 -08:00
AMDGPUMachineModuleInfo.cpp
Revert "Cleanup codegen includes"
2022-03-10 07:59:22 -05:00
AMDGPUMachineModuleInfo.h
…
AMDGPUMacroFusion.cpp
…
AMDGPUMacroFusion.h
…
AMDGPUMCInstLower.cpp
[AMDGPU] Move call clobbered return address registers s[30:31] to callee saved range
2022-03-09 12:18:02 +05:30
AMDGPUMCInstLower.h
[NFC][AMDGPU] Reduce includes dependencies, part 2
2021-10-01 17:50:20 +03:00
AMDGPUMIRFormatter.cpp
…
AMDGPUMIRFormatter.h
[llvm] Use = default (NFC)
2022-02-06 22:18:35 -08:00
AMDGPUOpenCLEnqueuedBlockLowering.cpp
[NFC] Remove unnecessary "#include"s from header files
2022-02-23 01:20:48 -08:00
AMDGPUPerfHintAnalysis.cpp
[AMDGPU] Return better Changed status from AMDGPUPerfHintAnalysis
2022-02-17 09:31:42 +00:00
AMDGPUPerfHintAnalysis.h
[AMDGPU] Tune perfhint analysis to account access width
2021-07-21 12:46:10 -07:00
AMDGPUPostLegalizerCombiner.cpp
Code quality: Combine V_RSQ
2021-11-30 17:17:15 +01:00
AMDGPUPreLegalizerCombiner.cpp
Cleanup includes: DebugInfo & CodeGen
2022-03-12 17:26:40 +01:00
AMDGPUPrintfRuntimeBinding.cpp
Reduce dependencies on llvm/BinaryFormat/Dwarf.h
2022-02-04 11:44:03 +01:00
AMDGPUPromoteAlloca.cpp
[AMDGPUPromoteAlloca] Make compatible with opaque pointers
2022-03-11 09:20:51 +01:00
AMDGPUPromoteKernelArguments.cpp
[AMDGPU] Set noclobber metadata on loads instead of cast to constant
2022-03-07 23:13:02 -08:00
AMDGPUPropagateAttributes.cpp
AMDGPU: Use attributor to propagate amdgpu-flat-work-group-size
2021-10-22 16:23:50 -04:00
AMDGPUPTNote.h
[NFC] Fix endif comments to match with include guard
2022-01-07 15:52:59 +08:00
AMDGPURegBankCombiner.cpp
AMDGPU/GlobalISel: Fix introducing f16 fmed3 for gfx8
2022-01-19 10:43:21 -05:00
AMDGPURegisterBankInfo.cpp
Cleanup includes: DebugInfo & CodeGen
2022-03-12 17:26:40 +01:00
AMDGPURegisterBankInfo.h
[nfc][codegen] Move RegisterBank[Info].h under CodeGen
2022-03-01 21:53:25 -08:00
AMDGPURegisterBanks.td
[AMDGPU] Add 224-bit vector types and link 192-bit types to MVTs
2021-06-24 12:41:22 +09:00
AMDGPUReplaceLDSUseWithPointer.cpp
[AMDGPU] Merge AMDGPULDSUtils into AMDGPUMemoryUtils
2022-02-11 10:32:24 -08:00
AMDGPUResourceUsageAnalysis.cpp
Revert "Cleanup codegen includes"
2022-03-10 07:59:22 -05:00
AMDGPUResourceUsageAnalysis.h
AMDGPU: Convert AMDGPUResourceUsageAnalysis to a Module pass
2022-02-04 15:56:04 -05:00
AMDGPURewriteOutArguments.cpp
[AMDGPURewriteOutArguments] Don't use pointer element type
2022-02-08 16:10:41 +01:00
AMDGPUSearchableTables.td
[AMDGPU] new gfx940 fp atomics
2022-03-07 12:32:02 -08:00
AMDGPUSubtarget.cpp
[AMDGPU] Fix uninitialized value after 8d0c34fd4f
2022-03-07 11:32:01 -08:00
AMDGPUSubtarget.h
[llvm] Use = default (NFC)
2022-02-06 22:18:35 -08:00
AMDGPUTargetMachine.cpp
Cleanup includes: DebugInfo & CodeGen
2022-03-12 17:26:40 +01:00
AMDGPUTargetMachine.h
mark getTargetTransformInfo and getTargetIRAnalysis as const
2022-02-25 14:30:44 -05:00
AMDGPUTargetObjectFile.cpp
…
AMDGPUTargetObjectFile.h
…
AMDGPUTargetTransformInfo.cpp
[AMDGPU] Fixed physreg asm constraint parsing
2022-01-12 16:37:08 -08:00
AMDGPUTargetTransformInfo.h
[Target][CodeGen] Remove default CostKind arguments on inner/impl TTI overrides
2021-09-22 15:28:08 +01:00
AMDGPUUnifyDivergentExitNodes.cpp
[Analysis, Target, Transforms] Construct SmallVector with iterator ranges (NFC)
2021-09-07 09:19:33 -07:00
AMDGPUUnifyMetadata.cpp
…
AMDKernelCodeT.h
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
BUFInstructions.td
[AMDGPU] gfx940 MUBUF format changes
2022-03-11 11:36:49 -08:00
CaymanInstructions.td
Code quality: Combine V_RSQ
2021-11-30 17:17:15 +01:00
CMakeLists.txt
[AMDGPU] Rename AMDGPUCFGStructurizer to R600MachineCFGStructurizer
2022-02-18 15:08:25 +00:00
DSInstructions.td
[AMDGPU] new gfx940 fp atomics
2022-03-07 12:32:02 -08:00
EvergreenInstructions.td
Code quality: Combine V_RSQ
2021-11-30 17:17:15 +01:00
EXPInstructions.td
…
FLATInstructions.td
[AMDGPU] Remove HasAtomicFaddInstsGFX90X and HasAtomicFaddInstsGFX940
2022-03-09 18:02:21 +00:00
GCNDPPCombine.cpp
[AMDGPU] Support v_mov_b64 in dpp combine
2022-03-11 11:37:32 -08:00
GCNHazardRecognizer.cpp
[AMDGPU] Fix typo in comment [NFC]
2022-02-22 13:27:26 +01:00
GCNHazardRecognizer.h
[Target] Remove unused forward declarations (NFC)
2022-01-02 10:20:15 -08:00
GCNILPSched.cpp
…
GCNIterativeScheduler.cpp
[AMDGPU][NFC] Fix typos
2021-11-12 11:37:21 +01:00
GCNIterativeScheduler.h
…
GCNMinRegStrategy.cpp
[AMDGPU][NFC] Fix typos
2021-11-12 11:37:21 +01:00
GCNNSAReassign.cpp
Revert "Cleanup codegen includes"
2022-03-10 07:59:22 -05:00
GCNPreRAOptimizations.cpp
[AMDGPU][NFC] Fix typos
2021-11-12 11:37:21 +01:00
GCNProcessors.td
[AMDGPU] Add gfx1036 target
2022-03-02 23:26:38 +00:00
GCNRegPressure.cpp
[NFC] Use Register instead of unsigned
2022-01-19 20:17:04 +08:00
GCNRegPressure.h
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
GCNSchedStrategy.cpp
Revert "Cleanup codegen includes"
2022-03-10 07:59:22 -05:00
GCNSchedStrategy.h
[AMDGPU] Add scheduler pass to rematerialize trivial defs
2022-03-09 09:34:33 -08:00
GCNSubtarget.h
[AMDGPU] Add v_mov_b64 gfx940 opcode
2022-03-07 12:07:12 -08:00
InstCombineTables.td
…
MIMGInstructions.td
[AMDGPU] Tweak predicates for image_bvh_intersect_ray instructions
2022-03-04 12:05:23 +00:00
R600.h
[AMDGPU] Rename AMDGPUCFGStructurizer to R600MachineCFGStructurizer
2022-02-18 15:08:25 +00:00
R600.td
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600AsmPrinter.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600AsmPrinter.h
…
R600ClauseMergePass.cpp
Revert "Cleanup codegen includes"
2022-03-10 07:59:22 -05:00
R600ControlFlowFinalizer.cpp
Revert "Cleanup codegen includes"
2022-03-10 07:59:22 -05:00
R600Defines.h
…
R600EmitClauseMarkers.cpp
Revert "Cleanup codegen includes"
2022-03-10 07:59:22 -05:00
R600ExpandSpecialInstrs.cpp
Revert "Cleanup codegen includes"
2022-03-10 07:59:22 -05:00
R600FrameLowering.cpp
Revert "Cleanup codegen includes"
2022-03-10 07:59:22 -05:00
R600FrameLowering.h
…
R600InstrFormats.td
…
R600InstrInfo.cpp
Revert "Cleanup codegen includes"
2022-03-10 07:59:22 -05:00
R600InstrInfo.h
[Target] Remove unused forward declarations (NFC)
2022-01-02 10:20:15 -08:00
R600InstrInfo.td
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600Instructions.td
Code quality: Combine V_RSQ
2021-11-30 17:17:15 +01:00
R600ISelDAGToDAG.cpp
[NFC][AMDGPU] Reduce includes dependencies, part 2
2021-10-01 17:50:20 +03:00
R600ISelLowering.cpp
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
R600ISelLowering.h
[Target] Remove unused forward declarations (NFC)
2022-01-02 10:20:15 -08:00
R600MachineCFGStructurizer.cpp
Revert "Cleanup codegen includes"
2022-03-10 07:59:22 -05:00
R600MachineFunctionInfo.cpp
…
R600MachineFunctionInfo.h
…
R600MachineScheduler.cpp
[llvm] Use range-based for loops (NFC)
2021-12-11 11:29:12 -08:00
R600MachineScheduler.h
[AMDGPU][NFC] Fix typos
2021-11-12 11:37:21 +01:00
R600MCInstLower.cpp
[NFC][AMDGPU] Reduce includes dependencies, part 2
2021-10-01 17:50:20 +03:00
R600OpenCLImageTypeLoweringPass.cpp
[llvm] Use range-based for loops (NFC)
2021-12-11 11:29:12 -08:00
R600OptimizeVectorRegisters.cpp
[Target] Use range-based for loops (NFC)
2021-12-17 10:11:08 -08:00
R600Packetizer.cpp
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
R600Processors.td
AMDGPU: Remove FeatureLocalMemorySize0
2021-09-02 22:43:01 -04:00
R600RegisterInfo.cpp
Revert "Rename llvm::array_lengthof into llvm::size to match std::size from C++17"
2022-01-26 16:55:53 +01:00
R600RegisterInfo.h
…
R600RegisterInfo.td
…
R600Schedule.td
…
R600Subtarget.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600Subtarget.h
[Target] Remove unused forward declarations (NFC)
2022-01-02 10:20:15 -08:00
R600TargetMachine.cpp
mark getTargetTransformInfo and getTargetIRAnalysis as const
2022-02-25 14:30:44 -05:00
R600TargetMachine.h
mark getTargetTransformInfo and getTargetIRAnalysis as const
2022-02-25 14:30:44 -05:00
R600TargetTransformInfo.cpp
[NFC][AMDGPU] Reduce includes dependencies, part 2
2021-10-01 17:50:20 +03:00
R600TargetTransformInfo.h
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R700Instructions.td
…
SIAnnotateControlFlow.cpp
[AMDGPU] Return better Changed status from SIAnnotateControlFlow
2022-02-17 09:38:57 +00:00
SIDefines.h
[AMDGPU] gfx940 uses new names for coherency bits
2022-03-07 11:50:07 -08:00
SIFixSGPRCopies.cpp
[Target] Use range-based for loops (NFC)
2021-11-26 21:21:17 -08:00
SIFixVGPRCopies.cpp
…
SIFoldOperands.cpp
AMDGPU: Skip folding REG_SEQUENCE if found unknown regclasses for its users
2022-03-08 10:11:57 +05:30
SIFormMemoryClauses.cpp
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
SIFrameLowering.cpp
[AMDGPU] Move call clobbered return address registers s[30:31] to callee saved range
2022-03-09 12:18:02 +05:30
SIFrameLowering.h
[Target] Remove unused forward declarations (NFC)
2022-01-02 10:20:15 -08:00
SIInsertHardClauses.cpp
Revert "Cleanup codegen includes"
2022-03-10 07:59:22 -05:00
SIInsertWaitcnts.cpp
[AMDGPU] Move call clobbered return address registers s[30:31] to callee saved range
2022-03-09 12:18:02 +05:30
SIInstrFormats.td
…
SIInstrInfo.cpp
[AMDGPU] Support v_mov_b64 in dpp combine
2022-03-11 11:37:32 -08:00
SIInstrInfo.h
[AMDGPU] Use new target MMO flag MONoClobber
2022-02-02 17:12:36 +00:00
SIInstrInfo.td
[AMDGPU] gfx940: support V_FMAMK_F32 and V_FMAAK_F32
2022-03-07 11:31:01 -08:00
SIInstructions.td
[AMDGPU] Enable divergence predicates for negative inline constant subtraction
2022-03-10 15:03:22 +03:00
SIISelLowering.cpp
Revert "Cleanup codegen includes"
2022-03-10 07:59:22 -05:00
SIISelLowering.h
[AMDGPU] Use new target MMO flag MONoClobber
2022-02-02 17:12:36 +00:00
SILateBranchLowering.cpp
[AArch64, AMDGPU] Use make_early_inc_range (NFC)
2021-11-03 09:22:51 -07:00
SILoadStoreOptimizer.cpp
[AMDGPU] Merge flat with global in the SILoadStoreOptimizer
2022-03-09 10:04:37 -08:00
SILowerControlFlow.cpp
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
SILowerI1Copies.cpp
[AMDGPU] Return better Changed status from SILowerI1Copies
2022-02-17 09:38:57 +00:00
SILowerSGPRSpills.cpp
Revert "Cleanup codegen includes"
2022-03-10 07:59:22 -05:00
SIMachineFunctionInfo.cpp
[AMDGPU][NFC]: Emit metadata for hidden_heap_v1 kernarg
2022-02-25 10:45:35 -08:00
SIMachineFunctionInfo.h
[AMDGPU][NFC]: Emit metadata for hidden_heap_v1 kernarg
2022-02-25 10:45:35 -08:00
SIMachineScheduler.cpp
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
SIMachineScheduler.h
[AMDGPU][NFC] Fix typos
2021-11-12 11:37:21 +01:00
SIMemoryLegalizer.cpp
[AMDGPU] gfx940 MUBUF format changes
2022-03-11 11:36:49 -08:00
SIModeRegister.cpp
Revert "Cleanup codegen includes"
2022-03-10 07:59:22 -05:00
SIOptimizeExecMasking.cpp
[AMDGPU] Return better Changed status from SIOptimizeExecMasking
2022-02-18 10:09:21 +00:00
SIOptimizeExecMaskingPreRA.cpp
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
SIOptimizeVGPRLiveRange.cpp
AMDGPU: Fix LiveVariables error after optimizing VGPR ranges
2022-01-17 09:38:35 -05:00
SIPeepholeSDWA.cpp
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
SIPostRABundler.cpp
[AMDGPU] Fix SIPostRABundler crash on null register used by dbg value
2021-11-18 17:01:19 -08:00
SIPreAllocateWWMRegs.cpp
Revert "Cleanup codegen includes"
2022-03-10 07:59:22 -05:00
SIPreEmitPeephole.cpp
[AMDGPU] Remove redundant isVALU in SIPreEmitPeephole. NFC
2022-02-27 16:09:20 +09:00
SIProgramInfo.cpp
…
SIProgramInfo.h
…
SIRegisterInfo.cpp
Revert "Cleanup codegen includes"
2022-03-10 07:59:22 -05:00
SIRegisterInfo.h
AMDGPU: Implement isAsmClobberable
2022-02-02 14:20:12 -05:00
SIRegisterInfo.td
[AMDGPU] Use subreg encoding instead of reassign
2022-03-10 12:50:29 -05:00
SISchedule.td
[AMDGPU] Set most sched model resource's BufferSize to one
2021-12-01 22:31:28 -08:00
SIShrinkInstructions.cpp
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
SIWholeQuadMode.cpp
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
SMInstructions.td
[AMDGPU] Mark time intrinsics as nomem, hassideeffects
2021-12-07 16:24:06 +00:00
SOPInstructions.td
[AMDGPU] Add llvm.amdgcn.s.setprio intrinsic
2022-03-12 22:15:42 -08:00
VIInstrFormats.td
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VOP1Instructions.td
[AMDGPU] Add v_mov_b64 gfx940 opcode
2022-03-07 12:07:12 -08:00
VOP2Instructions.td
[AMDGPU] gfx940: support V_FMAMK_F32 and V_FMAAK_F32
2022-03-07 11:31:01 -08:00
VOP3Instructions.td
[AMDGPU] Add constrained shift pattern matches.
2021-10-26 19:07:19 +05:30
VOP3PInstructions.td
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
VOPCInstructions.td
[AMDGPU] Set SALU, VALU and other instruction type flags on Real instructions
2021-06-16 13:36:02 +01:00
VOPInstructions.td
[AMDGPU] Changing S_AND_B32 to V_AND_B32_e64 in the divergent 'trunc' to i1 pattern
2021-12-24 18:24:49 +03:00