1e39575a98
DAGCombiner, as well as InstCombine, tend to canonicalize GE/LE into
GT/LT, namely:
```
X >= C --> X > (C - 1)
```
Which sometime generates off-by-one constants that could have been CSE'd
with surrounding constants.
Instead of changing such canonicalization, this patch tries to swap
those branch conditions post-isel, in the hope of resurfacing more
constant CSE opportunities. More specifically, it performs the following
optimization:
For two constants C0 and C1 from
```
li Y, C0
li Z, C1
```
To remove redundnat `li Y, C0`,
1. if C1 = C0 + 1 we can turn:
(a) blt Y, X -> bge X, Z
(b) bge Y, X -> blt X, Z
2. if C1 = C0 - 1 we can turn:
(a) blt X, Y -> bge Z, X
(b) bge X, Y -> blt Z, X
This optimization will be done by PeepholeOptimizer through
RISCVInstrInfo::optimizeCondBranch.
120 lines
3.4 KiB
LLVM
120 lines
3.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
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; RUN: llc -mtriple=riscv32 -O2 -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -mtriple=riscv64 -O2 -verify-machineinstrs < %s | FileCheck %s
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define void @u_case1_a(ptr %a, i32 signext %b, ptr %c, ptr %d) {
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; CHECK-LABEL: u_case1_a:
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; CHECK: # %bb.0:
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; CHECK-NEXT: li a4, 32
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; CHECK-NEXT: sw a4, 0(a0)
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; CHECK-NEXT: bgeu a1, a4, .LBB0_2
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; CHECK-NEXT: # %bb.1: # %block1
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; CHECK-NEXT: sw a1, 0(a2)
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB0_2: # %block2
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; CHECK-NEXT: li a0, 87
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; CHECK-NEXT: sw a0, 0(a3)
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; CHECK-NEXT: ret
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store i32 32, ptr %a
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%p = icmp ule i32 %b, 31
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br i1 %p, label %block1, label %block2
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block1: ; preds = %0
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store i32 %b, ptr %c
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br label %end_block
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block2: ; preds = %0
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store i32 87, ptr %d
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br label %end_block
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end_block: ; preds = %block2, %block1
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ret void
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}
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define void @case1_a(ptr %a, i32 signext %b, ptr %c, ptr %d) {
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; CHECK-LABEL: case1_a:
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; CHECK: # %bb.0:
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; CHECK-NEXT: li a4, -1
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; CHECK-NEXT: sw a4, 0(a0)
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; CHECK-NEXT: bge a1, a4, .LBB1_2
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; CHECK-NEXT: # %bb.1: # %block1
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; CHECK-NEXT: sw a1, 0(a2)
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB1_2: # %block2
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; CHECK-NEXT: li a0, 87
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; CHECK-NEXT: sw a0, 0(a3)
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; CHECK-NEXT: ret
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store i32 -1, ptr %a
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%p = icmp sle i32 %b, -2
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br i1 %p, label %block1, label %block2
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block1: ; preds = %0
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store i32 %b, ptr %c
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br label %end_block
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block2: ; preds = %0
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store i32 87, ptr %d
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br label %end_block
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end_block: ; preds = %block2, %block1
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ret void
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}
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define void @u_case2_a(ptr %a, i32 signext %b, ptr %c, ptr %d) {
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; CHECK-LABEL: u_case2_a:
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; CHECK: # %bb.0:
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; CHECK-NEXT: li a4, 32
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; CHECK-NEXT: sw a4, 0(a0)
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; CHECK-NEXT: bgeu a4, a1, .LBB2_2
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; CHECK-NEXT: # %bb.1: # %block1
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; CHECK-NEXT: sw a1, 0(a2)
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB2_2: # %block2
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; CHECK-NEXT: li a0, 87
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; CHECK-NEXT: sw a0, 0(a3)
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; CHECK-NEXT: ret
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store i32 32, ptr %a
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%p = icmp uge i32 %b, 33
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br i1 %p, label %block1, label %block2
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block1: ; preds = %0
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store i32 %b, ptr %c
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br label %end_block
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block2: ; preds = %0
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store i32 87, ptr %d
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br label %end_block
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end_block: ; preds = %block2, %block1
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ret void
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}
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define void @case2_a(ptr %a, i32 signext %b, ptr %c, ptr %d) {
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; CHECK-LABEL: case2_a:
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; CHECK: # %bb.0:
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; CHECK-NEXT: li a4, -4
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; CHECK-NEXT: sw a4, 0(a0)
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; CHECK-NEXT: bge a4, a1, .LBB3_2
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; CHECK-NEXT: # %bb.1: # %block1
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; CHECK-NEXT: sw a1, 0(a2)
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB3_2: # %block2
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; CHECK-NEXT: li a0, 87
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; CHECK-NEXT: sw a0, 0(a3)
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; CHECK-NEXT: ret
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store i32 -4, ptr %a
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%p = icmp sge i32 %b, -3
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br i1 %p, label %block1, label %block2
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block1: ; preds = %0
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store i32 %b, ptr %c
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br label %end_block
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block2: ; preds = %0
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store i32 87, ptr %d
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br label %end_block
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end_block: ; preds = %block2, %block1
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ret void
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}
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