5bac67d921
Simplify the code in AMDGPUResourceUsageAnalysis to rely more on the TargetRegisterInfo for computing the number of used SGPRs and AGPRs. This is a preliminary refactoring split out from #144855. (While we could technically use TRI to compute the used number of VGPRs at this point too, I'm leaving some of the original code in since for VGPRs we're going to introduce some special cases).
313 lines
12 KiB
C++
313 lines
12 KiB
C++
//===- AMDGPUResourceUsageAnalysis.h ---- analysis of resources -----------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// \brief Analyzes how many registers and other resources are used by
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/// functions.
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///
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/// The results of this analysis are used to fill the register usage, flat
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/// usage, etc. into hardware registers.
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///
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//===----------------------------------------------------------------------===//
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#include "AMDGPUResourceUsageAnalysis.h"
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#include "AMDGPU.h"
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#include "GCNSubtarget.h"
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#include "SIMachineFunctionInfo.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/TargetPassConfig.h"
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#include "llvm/IR/GlobalValue.h"
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#include "llvm/Target/TargetMachine.h"
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using namespace llvm;
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using namespace llvm::AMDGPU;
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#define DEBUG_TYPE "amdgpu-resource-usage"
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char llvm::AMDGPUResourceUsageAnalysisWrapperPass::ID = 0;
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char &llvm::AMDGPUResourceUsageAnalysisID =
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AMDGPUResourceUsageAnalysisWrapperPass::ID;
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// In code object v4 and older, we need to tell the runtime some amount ahead of
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// time if we don't know the true stack size. Assume a smaller number if this is
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// only due to dynamic / non-entry block allocas.
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static cl::opt<uint32_t> clAssumedStackSizeForExternalCall(
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"amdgpu-assume-external-call-stack-size",
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cl::desc("Assumed stack use of any external call (in bytes)"), cl::Hidden,
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cl::init(16384));
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static cl::opt<uint32_t> clAssumedStackSizeForDynamicSizeObjects(
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"amdgpu-assume-dynamic-stack-object-size",
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cl::desc("Assumed extra stack use if there are any "
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"variable sized objects (in bytes)"),
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cl::Hidden, cl::init(4096));
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INITIALIZE_PASS(AMDGPUResourceUsageAnalysisWrapperPass, DEBUG_TYPE,
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"Function register usage analysis", true, true)
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static const Function *getCalleeFunction(const MachineOperand &Op) {
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if (Op.isImm()) {
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assert(Op.getImm() == 0);
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return nullptr;
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}
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return cast<Function>(Op.getGlobal()->stripPointerCastsAndAliases());
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}
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static bool hasAnyNonFlatUseOfReg(const MachineRegisterInfo &MRI,
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const SIInstrInfo &TII, unsigned Reg) {
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for (const MachineOperand &UseOp : MRI.reg_operands(Reg)) {
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if (!UseOp.isImplicit() || !TII.isFLAT(*UseOp.getParent()))
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return true;
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}
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return false;
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}
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bool AMDGPUResourceUsageAnalysisWrapperPass::runOnMachineFunction(
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MachineFunction &MF) {
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auto *TPC = getAnalysisIfAvailable<TargetPassConfig>();
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if (!TPC)
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return false;
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const TargetMachine &TM = TPC->getTM<TargetMachine>();
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const MCSubtargetInfo &STI = *TM.getMCSubtargetInfo();
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// By default, for code object v5 and later, track only the minimum scratch
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// size
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uint32_t AssumedStackSizeForDynamicSizeObjects =
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clAssumedStackSizeForDynamicSizeObjects;
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uint32_t AssumedStackSizeForExternalCall = clAssumedStackSizeForExternalCall;
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if (AMDGPU::getAMDHSACodeObjectVersion(*MF.getFunction().getParent()) >=
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AMDGPU::AMDHSA_COV5 ||
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STI.getTargetTriple().getOS() == Triple::AMDPAL) {
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if (!clAssumedStackSizeForDynamicSizeObjects.getNumOccurrences())
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AssumedStackSizeForDynamicSizeObjects = 0;
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if (!clAssumedStackSizeForExternalCall.getNumOccurrences())
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AssumedStackSizeForExternalCall = 0;
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}
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ResourceInfo = AMDGPUResourceUsageAnalysisImpl().analyzeResourceUsage(
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MF, AssumedStackSizeForDynamicSizeObjects,
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AssumedStackSizeForExternalCall);
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return false;
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}
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AnalysisKey AMDGPUResourceUsageAnalysis::Key;
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AMDGPUResourceUsageAnalysis::Result
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AMDGPUResourceUsageAnalysis::run(MachineFunction &MF,
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MachineFunctionAnalysisManager &MFAM) {
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const MCSubtargetInfo &STI = *TM.getMCSubtargetInfo();
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// By default, for code object v5 and later, track only the minimum scratch
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// size
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uint32_t AssumedStackSizeForDynamicSizeObjects =
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clAssumedStackSizeForDynamicSizeObjects;
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uint32_t AssumedStackSizeForExternalCall = clAssumedStackSizeForExternalCall;
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if (AMDGPU::getAMDHSACodeObjectVersion(*MF.getFunction().getParent()) >=
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AMDGPU::AMDHSA_COV5 ||
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STI.getTargetTriple().getOS() == Triple::AMDPAL) {
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if (!clAssumedStackSizeForDynamicSizeObjects.getNumOccurrences())
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AssumedStackSizeForDynamicSizeObjects = 0;
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if (!clAssumedStackSizeForExternalCall.getNumOccurrences())
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AssumedStackSizeForExternalCall = 0;
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}
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return AMDGPUResourceUsageAnalysisImpl().analyzeResourceUsage(
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MF, AssumedStackSizeForDynamicSizeObjects,
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AssumedStackSizeForExternalCall);
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}
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AMDGPUResourceUsageAnalysisImpl::SIFunctionResourceInfo
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AMDGPUResourceUsageAnalysisImpl::analyzeResourceUsage(
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const MachineFunction &MF, uint32_t AssumedStackSizeForDynamicSizeObjects,
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uint32_t AssumedStackSizeForExternalCall) const {
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SIFunctionResourceInfo Info;
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const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
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const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
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const MachineFrameInfo &FrameInfo = MF.getFrameInfo();
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const MachineRegisterInfo &MRI = MF.getRegInfo();
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const SIInstrInfo *TII = ST.getInstrInfo();
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const SIRegisterInfo &TRI = TII->getRegisterInfo();
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Info.UsesFlatScratch = MRI.isPhysRegUsed(AMDGPU::FLAT_SCR_LO) ||
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MRI.isPhysRegUsed(AMDGPU::FLAT_SCR_HI) ||
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MRI.isLiveIn(MFI->getPreloadedReg(
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AMDGPUFunctionArgInfo::FLAT_SCRATCH_INIT));
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// Even if FLAT_SCRATCH is implicitly used, it has no effect if flat
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// instructions aren't used to access the scratch buffer. Inline assembly may
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// need it though.
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//
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// If we only have implicit uses of flat_scr on flat instructions, it is not
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// really needed.
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if (Info.UsesFlatScratch && !MFI->getUserSGPRInfo().hasFlatScratchInit() &&
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(!hasAnyNonFlatUseOfReg(MRI, *TII, AMDGPU::FLAT_SCR) &&
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!hasAnyNonFlatUseOfReg(MRI, *TII, AMDGPU::FLAT_SCR_LO) &&
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!hasAnyNonFlatUseOfReg(MRI, *TII, AMDGPU::FLAT_SCR_HI))) {
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Info.UsesFlatScratch = false;
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}
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Info.PrivateSegmentSize = FrameInfo.getStackSize();
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// Assume a big number if there are any unknown sized objects.
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Info.HasDynamicallySizedStack = FrameInfo.hasVarSizedObjects();
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if (Info.HasDynamicallySizedStack)
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Info.PrivateSegmentSize += AssumedStackSizeForDynamicSizeObjects;
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if (MFI->isStackRealigned())
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Info.PrivateSegmentSize += FrameInfo.getMaxAlign().value();
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Info.UsesVCC =
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MRI.isPhysRegUsed(AMDGPU::VCC_LO) || MRI.isPhysRegUsed(AMDGPU::VCC_HI);
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Info.NumExplicitSGPR = TRI.getNumUsedPhysRegs(MRI, AMDGPU::SGPR_32RegClass,
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/*IncludeCalls=*/false);
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if (ST.hasMAIInsts())
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Info.NumAGPR = TRI.getNumUsedPhysRegs(MRI, AMDGPU::AGPR_32RegClass,
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/*IncludeCalls=*/false);
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// If there are no calls, MachineRegisterInfo can tell us the used register
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// count easily.
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// A tail call isn't considered a call for MachineFrameInfo's purposes.
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if (!FrameInfo.hasCalls() && !FrameInfo.hasTailCall()) {
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Info.NumVGPR = TRI.getNumUsedPhysRegs(MRI, AMDGPU::VGPR_32RegClass,
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/*IncludeCalls=*/false);
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return Info;
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}
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int32_t MaxVGPR = -1;
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Info.CalleeSegmentSize = 0;
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for (const MachineBasicBlock &MBB : MF) {
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for (const MachineInstr &MI : MBB) {
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for (unsigned I = 0; I < MI.getNumOperands(); ++I) {
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const MachineOperand &MO = MI.getOperand(I);
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if (!MO.isReg())
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continue;
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Register Reg = MO.getReg();
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switch (Reg) {
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case AMDGPU::NoRegister:
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assert(MI.isDebugInstr() &&
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"Instruction uses invalid noreg register");
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continue;
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case AMDGPU::XNACK_MASK:
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case AMDGPU::XNACK_MASK_LO:
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case AMDGPU::XNACK_MASK_HI:
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llvm_unreachable("xnack_mask registers should not be used");
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case AMDGPU::LDS_DIRECT:
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llvm_unreachable("lds_direct register should not be used");
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case AMDGPU::TBA:
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case AMDGPU::TBA_LO:
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case AMDGPU::TBA_HI:
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case AMDGPU::TMA:
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case AMDGPU::TMA_LO:
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case AMDGPU::TMA_HI:
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llvm_unreachable("trap handler registers should not be used");
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case AMDGPU::SRC_VCCZ:
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llvm_unreachable("src_vccz register should not be used");
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case AMDGPU::SRC_EXECZ:
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llvm_unreachable("src_execz register should not be used");
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case AMDGPU::SRC_SCC:
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llvm_unreachable("src_scc register should not be used");
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default:
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break;
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}
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const TargetRegisterClass *RC = TRI.getPhysRegBaseClass(Reg);
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assert((!RC || TRI.isVGPRClass(RC) || TRI.isSGPRClass(RC) ||
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TRI.isAGPRClass(RC) || AMDGPU::TTMP_32RegClass.contains(Reg) ||
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AMDGPU::TTMP_64RegClass.contains(Reg) ||
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AMDGPU::TTMP_128RegClass.contains(Reg) ||
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AMDGPU::TTMP_256RegClass.contains(Reg) ||
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AMDGPU::TTMP_512RegClass.contains(Reg)) &&
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"Unknown register class");
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if (!RC || !TRI.isVGPRClass(RC))
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continue;
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unsigned Width = divideCeil(TRI.getRegSizeInBits(*RC), 32);
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unsigned HWReg = TRI.getHWRegIndex(Reg);
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int MaxUsed = HWReg + Width - 1;
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MaxVGPR = std::max(MaxUsed, MaxVGPR);
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}
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if (MI.isCall()) {
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// Pseudo used just to encode the underlying global. Is there a better
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// way to track this?
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const MachineOperand *CalleeOp =
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TII->getNamedOperand(MI, AMDGPU::OpName::callee);
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const Function *Callee = getCalleeFunction(*CalleeOp);
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// Avoid crashing on undefined behavior with an illegal call to a
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// kernel. If a callsite's calling convention doesn't match the
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// function's, it's undefined behavior. If the callsite calling
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// convention does match, that would have errored earlier.
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if (Callee && AMDGPU::isEntryFunctionCC(Callee->getCallingConv()))
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report_fatal_error("invalid call to entry function");
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auto isSameFunction = [](const MachineFunction &MF, const Function *F) {
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return F == &MF.getFunction();
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};
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if (Callee && !isSameFunction(MF, Callee))
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Info.Callees.push_back(Callee);
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bool IsIndirect = !Callee || Callee->isDeclaration();
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// FIXME: Call site could have norecurse on it
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if (!Callee || !Callee->doesNotRecurse()) {
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Info.HasRecursion = true;
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// TODO: If we happen to know there is no stack usage in the
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// callgraph, we don't need to assume an infinitely growing stack.
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if (!MI.isReturn()) {
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// We don't need to assume an unknown stack size for tail calls.
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// FIXME: This only benefits in the case where the kernel does not
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// directly call the tail called function. If a kernel directly
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// calls a tail recursive function, we'll assume maximum stack size
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// based on the regular call instruction.
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Info.CalleeSegmentSize = std::max(
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Info.CalleeSegmentSize,
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static_cast<uint64_t>(AssumedStackSizeForExternalCall));
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}
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}
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if (IsIndirect) {
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Info.CalleeSegmentSize =
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std::max(Info.CalleeSegmentSize,
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static_cast<uint64_t>(AssumedStackSizeForExternalCall));
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// Register usage of indirect calls gets handled later
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Info.UsesVCC = true;
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Info.UsesFlatScratch = ST.hasFlatAddressSpace();
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Info.HasDynamicallySizedStack = true;
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Info.HasIndirectCall = true;
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}
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}
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}
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}
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Info.NumVGPR = MaxVGPR + 1;
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return Info;
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}
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