c3ec80fea1
This provides an optimized implementation of SADDO/SSUBO/UADDO/USUBO as well as ADDCARRY/SUBCARRY on top of the new CC implementation. In particular, multi-word arithmetic now uses UADDO/ADDCARRY instead of the old ADDC/ADDE logic, which means we no longer need to use "glue" links for those instructions. This also allows making full use of the memory-based instructions like ALSI, which couldn't be recognized due to limitations in the DAG matcher previously. Also, the llvm.sadd.with.overflow et.al. intrinsincs now expand to directly using the ADD instructions and checking for a CC 3 result. llvm-svn: 331203
146 lines
4.2 KiB
LLVM
146 lines
4.2 KiB
LLVM
; Test 64-bit addition in which the second operand is constant and in which
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; three-operand forms are available.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
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declare i64 @foo()
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; Check subtraction of 1.
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define zeroext i1 @f1(i64 %dummy, i64 %a, i64 *%res) {
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; CHECK-LABEL: f1:
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; CHECK: alghsik [[REG1:%r[0-5]]], %r3, -1
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; CHECK-DAG: stg [[REG1]], 0(%r4)
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; CHECK-DAG: ipm [[REG2:%r[0-5]]]
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; CHECK-DAG: afi [[REG2]], -536870912
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; CHECK-DAG: risbg %r2, [[REG2]], 63, 191, 33
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; CHECK: br %r14
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%t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 1)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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store i64 %val, i64 *%res
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ret i1 %obit
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}
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; Check the high end of the ALGHSIK range.
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define zeroext i1 @f2(i64 %dummy, i64 %a, i64 *%res) {
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; CHECK-LABEL: f2:
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; CHECK: alghsik [[REG1:%r[0-5]]], %r3, -32768
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; CHECK-DAG: stg [[REG1]], 0(%r4)
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; CHECK-DAG: ipm [[REG2:%r[0-5]]]
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; CHECK-DAG: afi [[REG2]], -536870912
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; CHECK-DAG: risbg %r2, [[REG2]], 63, 191, 33
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; CHECK: br %r14
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%t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 32768)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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store i64 %val, i64 *%res
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ret i1 %obit
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}
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; Check the next value up, which must use SLGFI instead.
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define zeroext i1 @f3(i64 %dummy, i64 %a, i64 *%res) {
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; CHECK-LABEL: f3:
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; CHECK: slgfi %r3, 32769
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; CHECK-DAG: stg %r3, 0(%r4)
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; CHECK-DAG: ipm [[REG2:%r[0-5]]]
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; CHECK-DAG: afi [[REG2]], -536870912
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; CHECK-DAG: risbg %r2, [[REG2]], 63, 191, 33
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; CHECK: br %r14
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%t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 32769)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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store i64 %val, i64 *%res
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ret i1 %obit
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}
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; Check the high end of the negative ALGHSIK range.
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define zeroext i1 @f4(i64 %dummy, i64 %a, i64 *%res) {
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; CHECK-LABEL: f4:
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; CHECK: alghsik [[REG1:%r[0-5]]], %r3, 1
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; CHECK-DAG: stg [[REG1]], 0(%r4)
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; CHECK-DAG: ipm [[REG2:%r[0-5]]]
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; CHECK-DAG: afi [[REG2]], -536870912
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; CHECK-DAG: risbg %r2, [[REG2]], 63, 191, 33
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; CHECK: br %r14
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%t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 -1)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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store i64 %val, i64 *%res
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ret i1 %obit
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}
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; Check the low end of the ALGHSIK range.
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define zeroext i1 @f5(i64 %dummy, i64 %a, i64 *%res) {
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; CHECK-LABEL: f5:
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; CHECK: alghsik [[REG1:%r[0-5]]], %r3, 32767
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; CHECK-DAG: stg [[REG1]], 0(%r4)
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; CHECK-DAG: ipm [[REG2:%r[0-5]]]
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; CHECK-DAG: afi [[REG2]], -536870912
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; CHECK-DAG: risbg %r2, [[REG2]], 63, 191, 33
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; CHECK: br %r14
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%t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 -32767)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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store i64 %val, i64 *%res
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ret i1 %obit
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}
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; Test the next value down, which cannot use either ALGHSIK or SLGFI.
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define zeroext i1 @f6(i64 %dummy, i64 %a, i64 *%res) {
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; CHECK-LABEL: f6:
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; CHECK-NOT: alghsik
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; CHECK-NOT: slgfi
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; CHECK: br %r14
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%t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 -32768)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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store i64 %val, i64 *%res
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ret i1 %obit
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}
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; Check using the overflow result for a branch.
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define void @f7(i64 %dummy, i64 %a, i64 *%res) {
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; CHECK-LABEL: f7:
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; CHECK: alghsik [[REG1:%r[0-5]]], %r3, -1
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; CHECK-DAG: stg [[REG1]], 0(%r4)
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; CHECK: bnler %r14
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; CHECK: jg foo@PLT
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%t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 1)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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store i64 %val, i64 *%res
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br i1 %obit, label %call, label %exit
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call:
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tail call i64 @foo()
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br label %exit
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exit:
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ret void
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}
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; ... and the same with the inverted direction.
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define void @f8(i64 %dummy, i64 %a, i64 *%res) {
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; CHECK-LABEL: f8:
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; CHECK: alghsik [[REG1:%r[0-5]]], %r3, -1
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; CHECK-DAG: stg [[REG1]], 0(%r4)
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; CHECK: bler %r14
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; CHECK: jg foo@PLT
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%t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 1)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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store i64 %val, i64 *%res
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br i1 %obit, label %exit, label %call
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call:
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tail call i64 @foo()
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br label %exit
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exit:
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ret void
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}
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declare {i64, i1} @llvm.usub.with.overflow.i64(i64, i64) nounwind readnone
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