llvm-project/llvm/test/CodeGen/PowerPC/ppc32_64bit_support_cpus.ll
Matt Arsenault 5eebb58fb4
PPC: Fix regression for 32-bit ppc with 64-bit support (#159893)
Fixes regression after e5bbaa9c8fb6e06dbcbd39404039cc5d31df4410.
e5500 accidentally still had the 64bit feature applied instead of
64bit-support.
2025-09-20 02:31:38 +00:00

67 lines
1.8 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=powerpc-unknown-linux-gnu -mcpu=e5500 < %s | FileCheck -check-prefix=PPC32 %s
; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=e5500 < %s | FileCheck -check-prefix=PPC64 %s
; Test that ppc32 triples work on cpus that support 64-bit.
declare void @func(ptr)
declare void @func_no_args()
define void @call_assert() #0 {
; PPC32-LABEL: call_assert:
; PPC32: # %bb.0:
; PPC32-NEXT: mflr 0
; PPC32-NEXT: stwu 1, -16(1)
; PPC32-NEXT: li 3, 0
; PPC32-NEXT: stw 0, 20(1)
; PPC32-NEXT: bl func
; PPC32-NEXT: lwz 0, 20(1)
; PPC32-NEXT: addi 1, 1, 16
; PPC32-NEXT: mtlr 0
; PPC32-NEXT: blr
;
; PPC64-LABEL: call_assert:
; PPC64: # %bb.0:
; PPC64-NEXT: mflr 0
; PPC64-NEXT: stdu 1, -112(1)
; PPC64-NEXT: li 3, 0
; PPC64-NEXT: std 0, 128(1)
; PPC64-NEXT: bl func
; PPC64-NEXT: nop
; PPC64-NEXT: addi 1, 1, 112
; PPC64-NEXT: ld 0, 16(1)
; PPC64-NEXT: mtlr 0
; PPC64-NEXT: blr
call void @func(ptr null)
ret void
}
define void @call_nop_select_fail() #0 {
; PPC32-LABEL: call_nop_select_fail:
; PPC32: # %bb.0:
; PPC32-NEXT: mflr 0
; PPC32-NEXT: stwu 1, -16(1)
; PPC32-NEXT: stw 0, 20(1)
; PPC32-NEXT: bl func_no_args
; PPC32-NEXT: lwz 0, 20(1)
; PPC32-NEXT: addi 1, 1, 16
; PPC32-NEXT: mtlr 0
; PPC32-NEXT: blr
;
; PPC64-LABEL: call_nop_select_fail:
; PPC64: # %bb.0:
; PPC64-NEXT: mflr 0
; PPC64-NEXT: stdu 1, -112(1)
; PPC64-NEXT: std 0, 128(1)
; PPC64-NEXT: bl func_no_args
; PPC64-NEXT: nop
; PPC64-NEXT: addi 1, 1, 112
; PPC64-NEXT: ld 0, 16(1)
; PPC64-NEXT: mtlr 0
; PPC64-NEXT: blr
call void @func_no_args()
ret void
}
attributes #0 = { nounwind }