Zi Xuan Wu (Zeson) 2ccb2dbc8d [RISCV] Don't fold RISCVISD::VMV_V_X_VL series node and scalar load to vector load when scalar load is update load ...

We try to fold RISCVISD::VMV_V_X_VL series node + scalar load -> vector load.
But if scalar load is indexed load (load update form), it's not profitable to fold because load update node can't be removed after fold.

Differential Revision: https://reviews.llvm.org/D152222

2023-07-11 15:56:31 +08:00

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AArch64

[AArch64] Ensure constrained register class in INS peephole.

2023-07-10 22:48:10 +01:00

AMDGPU

[GlobalISel] Remove an erroneous oneuse check in the G_ADD reassociation combine.

2023-07-10 01:03:12 -07:00

ARC

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ARM

[ARM] fix typo in large-stack.ll introduced when fixing another typo

2023-07-04 11:23:24 +01:00

AVR

[AVR] Optimize 8-bit rotation when rotation bits == 3

2023-06-11 08:41:47 +08:00

BPF

Revert "[BPF] Undo transformation for LICM.cpp:hoistMinMax()"

2023-07-07 04:01:31 +03:00

CSKY

[CSKY] Optimize conditional select with CLRT/CLRF

2023-07-04 15:22:18 +08:00

DirectX

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Generic

Reland "[DebugMetadata][DwarfDebug] Fix DWARF emisson of function-local imported entities (3/7)"

2023-06-16 00:49:59 +02:00

Hexagon

[DAGCombine] Fold (store (insert_elt (load p)) x p) -> (store x)

2023-06-28 22:45:04 +01:00

Inputs

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Lanai

[InstCombine][CGP] Move swapMayExposeCSEOpportunities() fold

2023-06-15 14:17:58 +02:00

LoongArch

[LoongArch] Explicitly specify instruction properties

2023-07-11 08:45:24 +08:00

M68k

[M68k][MC] Add support for 32 bit register-register multiply/divide

2023-06-29 21:39:41 -07:00

Mips

[CodeGen]Allow targets to use target specific COPY instructions for live range splitting

2023-07-07 22:29:50 +05:30

MIR

[AMDGPU][SILowerSGPRSpills] Spill SGPRs to virtual VGPRs

2023-07-07 23:14:32 +05:30

MLRegalloc

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MSP430

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NVPTX

[OpenMP][NVPTX] Handle additional invalid PTX characters

2023-06-30 14:58:37 -05:00

PowerPC

Implement -frecord-command-line for XCOFF

2023-07-10 12:47:07 -04:00

RISCV

[RISCV] Don't fold RISCVISD::VMV_V_X_VL series node and scalar load to vector load when scalar load is update load

2023-07-11 15:56:31 +08:00

SPARC

[NFC] Autogenerate CodeGen/SPARC/LeonInsertNOPLoadPassUT.ll

2023-06-15 13:24:39 +00:00

SPIRV

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SystemZ

[NFC] Autogenerate CodeGen/SystemZ/int-{uadd,sub}-0*.ll

2023-07-05 20:14:43 +00:00

Thumb

[ARM] make execute only long call test checks more robust

2023-07-04 10:51:48 +01:00

Thumb2

[CGP] Enable CodeGenPrepares phi type convertion.

2023-07-09 10:32:11 +01:00

VE

[SelectionDAG] Improve expansion of wide min/max

2023-06-26 10:45:41 -07:00

WebAssembly

[WebAssembly] Add frexp{f,l} libcall signatures

2023-07-06 13:37:11 -07:00

WinCFGuard

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WinEH

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X86

DAG: Correct chain management for frexp libcalls

2023-07-10 21:39:15 -04:00

XCore

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