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llvm-project/llvm/test/CodeGen
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Amara Emerson 2e7deee376 [AArch64][GlobalISel] Re-generate some tests for D110802.
2021-09-30 04:15:30 -07:00
..
AArch64
[AArch64][GlobalISel] Re-generate some tests for D110802.
2021-09-30 04:15:30 -07:00
AMDGPU
[LiveIntervals] Remove unused subreg ranges in repairIntervalsInRange
2021-09-30 09:15:10 +01:00
ARC
[ARC] Improve code generated for i32 ADDC/ADDE and SUBC/SUBE
2021-09-10 13:04:08 -07:00
ARM
Revert "Allow rematerialization of virtual reg uses"
2021-09-24 10:26:11 -07:00
AVR
[AVR] emit 'MCSA_Global' references to '__do_global_ctors' and '__do_global_dtors'
2021-08-05 10:37:36 +08:00
BPF
BPF: make 32bit register spill with 64bit alignment
2021-09-20 21:00:25 -07:00
Generic
Moved the test to X86 as it's x86 specific.
2021-08-31 14:48:29 -04:00
Hexagon
[LiveIntervals] Repair subreg ranges in processTiedPairs
2021-09-28 08:10:16 +01:00
Inputs
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Lanai
[Lanai] implement wide immediate support
2021-09-10 10:54:43 +00:00
M68k
[M68k][test] Migrate the remaining fixup and relaxation tests
2021-09-04 16:27:13 -07:00
Mips
Fix tests defaulting to incorrect triples on AIX
2021-09-27 11:30:45 -04:00
MIR
[Tests] Fix incorrect noalias metadata
2021-09-18 20:51:00 +02:00
MSP430
[llvm-readobj] Support dumping of MSP430 ELF attributes
2021-09-28 00:56:11 +03:00
NVPTX
Fix tests defaulting to incorrect triples on AIX
2021-09-27 11:30:45 -04:00
PowerPC
[PowerPC] swdiv builtins for XL compatibility
2021-09-29 11:31:07 -05:00
RISCV
[SelectionDAG] Make WidenVecRes_EXTRACT_SUBVECTOR work for scalable vectors.
2021-09-29 11:33:45 +01:00
SPARC
Fix tests defaulting to incorrect triples on AIX
2021-09-27 11:30:45 -04:00
SystemZ
[LiveIntervals] Repair subreg ranges in processTiedPairs
2021-09-28 08:10:16 +01:00
Thumb
Revert "Allow rematerialization of virtual reg uses"
2021-09-24 10:26:11 -07:00
Thumb2
[LiveIntervals] Remove unused subreg ranges in repairIntervalsInRange
2021-09-30 09:15:10 +01:00
VE
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WebAssembly
[WebAssembly] Add prototype relaxed SIMD fma/fms instructions
2021-09-23 11:01:36 -07:00
WinCFGuard
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WinEH
Fix SEH table addresses for Windows
2021-08-20 22:32:12 +03:00
X86
[NFC][X86][Codegen] Add test coverage for interleaved i32 load/store stride=2
2021-09-29 22:17:12 +03:00
XCore
…