Matt Arsenault 2f2ac3de69

DAG: Avoid stack usage in bitcast operand promotion to legal vector (#125637) ...

Fix introducing stack usage if a bitcast source operand is an illegal
integer type cast to a legal vector type. This should cover more
situations, but this is the first one I noticed.

2025-02-04 16:43:42 +07:00

..

AArch64

[AArch64][SME] Spill p-regs as z-regs when streaming hazards are possible (#123752)

2025-02-03 12:04:46 +00:00

AMDGPU

DAG: Avoid stack usage in bitcast operand promotion to legal vector (#125637)

2025-02-04 16:43:42 +07:00

ARC

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ARM

TwoAddressInstruction: Fix assert on undef operand with -early-live-intervals (#125518)

2025-02-03 23:48:28 +07:00

AVR

[AVR] Force relocations for non-encodable jumps (#121498)

2025-01-20 09:23:57 +08:00

BPF

[IR] Convert from nocapture to captures(none) (#123181)

2025-01-29 16:56:47 +01:00

CSKY

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DirectX

[HLSL][SPIRV][DXIL] Implement WaveActiveMax intrinsic (#123428)

2025-01-27 23:26:56 -08:00

Generic

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Hexagon

[IR] Convert from nocapture to captures(none) (#123181)

2025-01-29 16:56:47 +01:00

Inputs

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Lanai

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LoongArch

[DAG] getNode - convert scalar i1 arithmetic calls to bitwise instructions (#125486)

2025-02-03 16:36:01 +00:00

M68k

[M68k] always use movem for register spills (#106715)

2025-01-31 19:42:40 -06:00

Mips

[DAG] getNode - convert scalar i1 arithmetic calls to bitwise instructions (#125486)

2025-02-03 16:36:01 +00:00

MIR

[Clang] Cleanup docs and comments relating to -fextend-variable-liveness (#124767)

2025-01-28 18:25:32 +00:00

MLRegAlloc

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MSP430

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NVPTX

[NVPTX] Add tcgen05 alloc/dealloc intrinsics (#124961)

2025-02-04 14:31:40 +05:30

PowerPC

[MachineScheduler] Fix physreg dependencies of ExitSU (#123541)

2025-02-01 20:40:50 +03:00

RISCV

[RISCV] Add tests for widening FP VP reductions. NFC

2025-02-04 14:18:19 +08:00

SPARC

[TargetLowering] Improve one signature of forceExpandWideMUL. (#123991)

2025-01-23 12:49:35 -08:00

SPIRV

[HLSL][SPIRV][DXIL] Implement WaveActiveMax intrinsic (#123428)

2025-01-27 23:26:56 -08:00

SystemZ

[LegalizeDAG] Use Base+Offset instead of Offset+Base for jump tables

2025-01-31 14:05:34 -08:00

Thumb

[TargetLowering] Improve one signature of forceExpandWideMUL. (#123991)

2025-01-23 12:49:35 -08:00

Thumb2

[MachineScheduler] Fix physreg dependencies of ExitSU (#123541)

2025-02-01 20:40:50 +03:00

VE

[LegalizeDAG] Use Base+Offset instead of Offset+Base for jump tables

2025-01-31 14:05:34 -08:00

WebAssembly

[WebAssembly] Autovec support for dot (#123207)

2025-02-03 08:58:43 +00:00

WinCFGuard

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WinEH

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X86

[X86] EmitCmp - use existing XOR node to check for equality (#125506)

2025-02-04 09:14:37 +00:00

XCore

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Xtensa

[CodeGen] Clean up tests that depend on implicit .text in MCAsmStreamer

2024-12-22 21:11:32 -08:00