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llvm-project/llvm/test/CodeGen
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Craig Topper 2f3b738960 [RISCV] Add optimizations for FMV_X_ANYEXTH similar to FMV_X_ANYEXTW_RV64. 
This enables the fneg and fabs combines we have for FMV_X_ANYEXTW_RV64.
2021-08-08 18:30:48 -07:00
..
AArch64
[GlobalISel] Fix a combine causing DBG_VALUE with dangling vregs.
2021-08-07 01:41:02 -07:00
AMDGPU
[AMDGPU] Added test for MachineLICM reg pressure. NFC.
2021-08-06 16:00:35 -07:00
ARC
[ARC] Add codegen for llvm.ctlz intrinsic for the ARC backend
2021-08-06 12:18:06 -07:00
ARM
[ARM] Define ComplexPatternFuncMutatesDAG
2021-08-06 17:35:11 +01:00
AVR
[AVR] emit 'MCSA_Global' references to '__do_global_ctors' and '__do_global_dtors'
2021-08-05 10:37:36 +08:00
BPF
BPF: avoid NE/EQ loop exit condition
2021-08-04 16:54:16 -07:00
Generic
[PowerPC] Add pwr7 and pwr10 support to IBM MASSV pass on AIX
2021-07-26 23:21:38 +00:00
Hexagon
[Hexagon] Fix resetting dead registers in DBG_VALUE_LISTs
2021-07-27 18:36:28 -05:00
Inputs
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Lanai
[Lanai] fix lowering wide returns
2021-08-05 21:08:09 -07:00
M68k
[M68k] Separate ADDA from ADD and migrate rest of the arithmetic MC tests
2021-08-07 17:19:12 -07:00
Mips
GlobalISel/AArch64: don't optimize away redundant branches at -O0
2021-07-29 16:04:22 -07:00
MIR
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
MSP430
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NVPTX
[NVPTX] Add NVPTX intrinsics for CUDA PTX 6.5 ldmatrix instructions
2021-08-06 16:13:35 -07:00
PowerPC
Fix PPC buildbot break caused by 4c4093e6e39fe6601f9c95a95a6bc242ef648cd5
2021-08-06 22:10:20 -05:00
RISCV
[RISCV] Add optimizations for FMV_X_ANYEXTH similar to FMV_X_ANYEXTW_RV64.
2021-08-08 18:30:48 -07:00
SPARC
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
SystemZ
[NFC][Codegen][SystemZ] Autogenerate checklines in int-cmp-47.ll
2021-08-04 01:47:39 +03:00
Thumb
[ARM] Regenerate Thumb PR35481.ll test. NFC
2021-07-31 16:21:23 +01:00
Thumb2
[Thumb2] generate checks in ldr-str-imm12.ll. NFC.
2021-08-05 14:58:02 -07:00
VE
[LegalizeTypes][VE] Don't Expand BITREVERSE/BSWAP during type legalization promotion if they will be promoted for NVT in op legalization.
2021-06-29 11:00:11 -07:00
WebAssembly
[WebAssembly] Don't do SjLj transformation when there's only setjmp
2021-08-05 15:28:02 -07:00
WinCFGuard
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WinEH
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X86
[X86] Teach shouldSinkOperands to recognize pmuldq/pmuludq patterns.
2021-08-07 08:45:56 -07:00
XCore
Update @llvm.powi to handle different int sizes for the exponent
2021-06-17 09:38:28 +02:00