906580bad3
These builtins are already there in Clang, however current codegen may produce suboptimal results due to their complex behavior. Implement them as intrinsics to ensure expected instructions are emitted.
118 lines
2.8 KiB
LLVM
118 lines
2.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
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; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s
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define i32 @test1(i32 %x, i32 %y) {
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; CHECK-LABEL: test1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: rlwimi 4, 3, 16, 0, 15
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; CHECK-NEXT: mr 3, 4
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; CHECK-NEXT: blr
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entry:
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%tmp.3 = shl i32 %x, 16
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%tmp.7 = and i32 %y, 65535
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%tmp.9 = or i32 %tmp.7, %tmp.3
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ret i32 %tmp.9
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}
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define i32 @test2(i32 %x, i32 %y) {
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; CHECK-LABEL: test2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: rlwimi 3, 4, 16, 0, 15
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; CHECK-NEXT: blr
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entry:
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%tmp.7 = and i32 %x, 65535
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%tmp.3 = shl i32 %y, 16
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%tmp.9 = or i32 %tmp.7, %tmp.3
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ret i32 %tmp.9
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}
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define i32 @test3(i32 %x, i32 %y) {
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; CHECK-LABEL: test3:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: rlwimi 4, 3, 16, 16, 31
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; CHECK-NEXT: mr 3, 4
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; CHECK-NEXT: blr
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entry:
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%tmp.3 = lshr i32 %x, 16
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%tmp.6 = and i32 %y, -65536
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%tmp.7 = or i32 %tmp.6, %tmp.3
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ret i32 %tmp.7
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}
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define i32 @test4(i32 %x, i32 %y) {
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; CHECK-LABEL: test4:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: rlwimi 3, 4, 16, 16, 31
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; CHECK-NEXT: blr
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entry:
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%tmp.6 = and i32 %x, -65536
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%tmp.3 = lshr i32 %y, 16
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%tmp.7 = or i32 %tmp.6, %tmp.3
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ret i32 %tmp.7
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}
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define i32 @test5(i32 %x, i32 %y) {
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; CHECK-LABEL: test5:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: rlwimi 4, 3, 1, 0, 15
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; CHECK-NEXT: mr 3, 4
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; CHECK-NEXT: blr
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entry:
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%tmp.3 = shl i32 %x, 1
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%tmp.4 = and i32 %tmp.3, -65536
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%tmp.7 = and i32 %y, 65535
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%tmp.9 = or i32 %tmp.4, %tmp.7
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ret i32 %tmp.9
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}
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define i32 @test6(i32 %x, i32 %y) {
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; CHECK-LABEL: test6:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: rlwimi 3, 4, 1, 0, 15
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; CHECK-NEXT: blr
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entry:
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%tmp.7 = and i32 %x, 65535
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%tmp.3 = shl i32 %y, 1
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%tmp.4 = and i32 %tmp.3, -65536
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%tmp.9 = or i32 %tmp.4, %tmp.7
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ret i32 %tmp.9
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}
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define i32 @test7(i32 %x, i32 %y) {
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; CHECK-LABEL: test7:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: andis. 3, 3, 65535
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; CHECK-NEXT: rldimi 3, 4, 0, 48
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; CHECK-NEXT: blr
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entry:
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%tmp.2 = and i32 %x, -65536
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%tmp.5 = and i32 %y, 65535
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%tmp.7 = or i32 %tmp.5, %tmp.2
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ret i32 %tmp.7
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}
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define i32 @test8(i32 %bar) {
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; CHECK-LABEL: test8:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: rlwimi 3, 3, 1, 30, 30
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; CHECK-NEXT: blr
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entry:
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%tmp.3 = shl i32 %bar, 1
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%tmp.4 = and i32 %tmp.3, 2
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%tmp.6 = and i32 %bar, -3
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%tmp.7 = or i32 %tmp.4, %tmp.6
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ret i32 %tmp.7
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}
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define i32 @test9(i32 %a, i32 %b) {
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; CHECK-LABEL: test9:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: rlwimi 3, 4, 8, 20, 26
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; CHECK-NEXT: blr
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entry:
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%r = call i32 @llvm.ppc.rlwimi(i32 %a, i32 %b, i32 8, i32 4064)
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ret i32 %r
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}
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declare i32 @llvm.ppc.rlwimi(i32, i32, i32 immarg, i32 immarg)
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