7dbfc2bd00
This change adds initial support for managing the Permission Overlay Extension (POE). This extension allows userspace programs to change memory permissions without making a sycall. This is used to implement Linux's memory protection keys (https://docs.kernel.org/core-api/protection-keys.html) on AArch64. Overview of POE: * Page table entries have a set of permissions. To change these, a program would have to use a syscall which adds overhead. * 3 bits of the page table entry are used for a protection key 0-7. * POE adds a new register "por" (POR_EL0 in the manual) which stores 4-bit sets of permissions. * The protection key is an index into this por register. * Permissions in POR are applied on top of the page table permissions, but may only remove permissions. For example, if you overlay read/execute over read/write, the result is read. Since execute was not in the page table permissions. * This register can be modified without leaving userspace, making permission changes faster. To help debug this, I have made the following changes to LLDB: * Ability to read and write the por register. * Save and restore of por when running expressions. * Register field definitions to print the por permissions in a human readable form. * Recognition of memory protection key faults as a distinct type of SIGSEGV (this will apply to Linux on any architecture). There are a few more features to add around memory region information, that will be in follow up changes. As will documentation and release notes for all the POE features.
81 lines
2.5 KiB
Python
81 lines
2.5 KiB
Python
"""
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Platform-agnostic helper to query for CPU features.
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"""
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import re
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class CPUFeature:
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def __init__(self, linux_cpu_info_flag: str = None, darwin_sysctl_key: str = None):
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self.cpu_info_flag = linux_cpu_info_flag
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self.sysctl_key = darwin_sysctl_key
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def __str__(self):
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for arch_class in ALL_ARCHS:
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for feat_var in dir(arch_class):
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if self == getattr(arch_class, feat_var):
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return f"{arch_class.__name__}.{feat_var}"
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raise AssertionError("unreachable")
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def is_supported(self, triple, cmd_runner):
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if re.match(".*-.*-linux", triple):
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err_msg, res = self._is_supported_linux(cmd_runner)
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elif re.match(".*-apple-.*", triple):
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err_msg, res = self._is_supported_darwin(cmd_runner)
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else:
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err_msg, res = None, False
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if err_msg:
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print(f"CPU feature check failed: {err_msg}")
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return res
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def _is_supported_linux(self, cmd_runner):
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if not self.cpu_info_flag:
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return f"Unspecified cpuinfo flag for {self}", False
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cmd = "cat /proc/cpuinfo"
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err, retcode, output = cmd_runner(cmd)
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if err.Fail() or retcode != 0:
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return output, False
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# Assume that every processor presents the same features.
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# Look for the first "Features: ...." line. Features are space separated.
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if m := re.search(r"Features\s*: (.*)\n", output):
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features = m.group(1).split()
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return None, (self.cpu_info_flag in features)
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return 'No "Features:" line found in /proc/cpuinfo', False
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def _is_supported_darwin(self, cmd_runner):
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if not self.sysctl_key:
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return f"Unspecified sysctl key for {self}", False
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cmd = f"sysctl -n {self.sysctl_key}"
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err, retcode, output = cmd_runner(cmd)
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if err.Fail() or retcode != 0:
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return output, False
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return None, (output.strip() == "1")
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class AArch64:
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FPMR = CPUFeature("fpmr")
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POE = CPUFeature("poe")
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GCS = CPUFeature("gcs")
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MTE = CPUFeature("mte", "hw.optional.arm.FEAT_MTE4")
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MTE_STORE_ONLY = CPUFeature("mtestoreonly")
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PTR_AUTH = CPUFeature("paca", "hw.optional.arm.FEAT_PAuth2")
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SME = CPUFeature("sme", "hw.optional.arm.FEAT_SME")
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SME_FA64 = CPUFeature("smefa64")
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SME2 = CPUFeature("sme2", "hw.optional.arm.FEAT_SME2")
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SVE = CPUFeature("sve")
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class Loong:
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LASX = CPUFeature("lasx")
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LSX = CPUFeature("lsx")
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ALL_ARCHS = [AArch64, Loong]
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