fb86b3d96b
Need to set the insertion point for (non-schedulable) vector node after the last instruction in the node to avoid def-use breakage. But it also causes miscompilation with gather/buildvector operands of the phi nodes, used in the same phi only in the block. These nodes supposed to be inserted at the end of the block and after changing the insertion point for the non-schedulable vec block, it also may break def-use dependencies. Need to prevector such nodes, to emit them as early as possible, so the vectorized nodes are inserted before these nodes. Fixes #139728 Recommit after revert 60fb92179291e848eb7b04913bdc818d081db296 Reviewers: hiraditya, HanKuanChen, RKSimon Reviewed By: RKSimon Pull Request: https://github.com/llvm/llvm-project/pull/139917
50 lines
1.9 KiB
LLVM
50 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu -slp-threshold=-99999 < %s | FileCheck %s
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define void @wombat(i32 %arg) {
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; CHECK-LABEL: define void @wombat(
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; CHECK-SAME: i32 [[ARG:%.*]]) {
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; CHECK-NEXT: [[BB:.*:]]
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; CHECK-NEXT: br label %[[BB1:.*]]
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; CHECK: [[BB1]]:
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; CHECK-NEXT: br i1 false, label %[[BB2:.*]], label %[[BB5:.*]]
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; CHECK: [[BB2]]:
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; CHECK-NEXT: [[TMP0:%.*]] = phi <2 x i32> [ [[TMP4:%.*]], %[[BB4:.*]] ], [ zeroinitializer, %[[BB1]] ]
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; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> <i32 poison, i32 1>, i32 [[ARG]], i32 0
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; CHECK-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> <i32 poison, i32 0>, i32 [[ARG]], i32 0
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; CHECK-NEXT: [[TMP2:%.*]] = sub <2 x i32> [[TMP0]], [[TMP1]]
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; CHECK-NEXT: [[TMP3:%.*]] = or <2 x i32> [[TMP0]], [[TMP1]]
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; CHECK-NEXT: [[TMP4]] = shufflevector <2 x i32> [[TMP2]], <2 x i32> [[TMP3]], <2 x i32> <i32 0, i32 3>
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; CHECK-NEXT: [[TMP6:%.*]] = sub <2 x i32> [[TMP0]], [[TMP5]]
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; CHECK-NEXT: [[TMP7:%.*]] = and <2 x i32> [[TMP0]], [[TMP5]]
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; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <2 x i32> [[TMP6]], <2 x i32> [[TMP7]], <2 x i32> <i32 0, i32 3>
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; CHECK-NEXT: br label %[[BB4]]
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; CHECK: [[BB4]]:
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; CHECK-NEXT: br i1 false, label %[[BB2]], label %[[BB5]]
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; CHECK: [[BB5]]:
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; CHECK-NEXT: [[TMP9:%.*]] = phi <2 x i32> [ zeroinitializer, %[[BB1]] ], [ [[TMP8]], %[[BB4]] ]
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; CHECK-NEXT: ret void
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;
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bb:
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br label %bb1
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bb1:
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br i1 false, label %bb2, label %bb5
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bb2:
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%phi = phi i32 [ %or, %bb4 ], [ 0, %bb1 ]
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%phi3 = phi i32 [ %sub, %bb4 ], [ 0, %bb1 ]
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%or = or i32 %phi, 1
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%and = and i32 0, %phi
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%sub = sub i32 %phi3, %arg
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br label %bb4
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bb4:
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br i1 false, label %bb2, label %bb5
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bb5:
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%phi6 = phi i32 [ 0, %bb1 ], [ %and, %bb4 ]
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%phi7 = phi i32 [ 0, %bb1 ], [ %sub, %bb4 ]
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ret void
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}
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