f2942b9077
Provide isDead interface for access to ad-hoc isDead queries. LivePhysRegs is optional: if not provided, pessimistically check deadness of a single MI without doing the LivePhysReg walk; if provided it is assumed to be at the position of MI.
123 lines
3.9 KiB
C++
123 lines
3.9 KiB
C++
//===- DeadMachineInstructionElim.cpp - Remove dead machine instructions --===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This is an extremely simple MachineInstr-level dead-code-elimination pass.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/DeadMachineInstructionElim.h"
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#include "llvm/ADT/PostOrderIterator.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/CodeGen/LiveRegUnits.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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#include "llvm/InitializePasses.h"
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#include "llvm/Pass.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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#define DEBUG_TYPE "dead-mi-elimination"
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STATISTIC(NumDeletes, "Number of dead instructions deleted");
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namespace {
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class DeadMachineInstructionElimImpl {
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const MachineRegisterInfo *MRI = nullptr;
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const TargetInstrInfo *TII = nullptr;
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LiveRegUnits LivePhysRegs;
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public:
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bool runImpl(MachineFunction &MF);
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private:
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bool eliminateDeadMI(MachineFunction &MF);
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};
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class DeadMachineInstructionElim : public MachineFunctionPass {
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public:
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static char ID; // Pass identification, replacement for typeid
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DeadMachineInstructionElim() : MachineFunctionPass(ID) {
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initializeDeadMachineInstructionElimPass(*PassRegistry::getPassRegistry());
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}
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bool runOnMachineFunction(MachineFunction &MF) override {
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if (skipFunction(MF.getFunction()))
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return false;
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return DeadMachineInstructionElimImpl().runImpl(MF);
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}
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.setPreservesCFG();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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};
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} // namespace
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PreservedAnalyses
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DeadMachineInstructionElimPass::run(MachineFunction &MF,
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MachineFunctionAnalysisManager &) {
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if (!DeadMachineInstructionElimImpl().runImpl(MF))
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return PreservedAnalyses::all();
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PreservedAnalyses PA = getMachineFunctionPassPreservedAnalyses();
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PA.preserveSet<CFGAnalyses>();
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return PA;
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}
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char DeadMachineInstructionElim::ID = 0;
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char &llvm::DeadMachineInstructionElimID = DeadMachineInstructionElim::ID;
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INITIALIZE_PASS(DeadMachineInstructionElim, DEBUG_TYPE,
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"Remove dead machine instructions", false, false)
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bool DeadMachineInstructionElimImpl::runImpl(MachineFunction &MF) {
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MRI = &MF.getRegInfo();
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const TargetSubtargetInfo &ST = MF.getSubtarget();
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TII = ST.getInstrInfo();
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LivePhysRegs.init(*ST.getRegisterInfo());
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bool AnyChanges = eliminateDeadMI(MF);
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while (AnyChanges && eliminateDeadMI(MF))
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;
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return AnyChanges;
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}
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bool DeadMachineInstructionElimImpl::eliminateDeadMI(MachineFunction &MF) {
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bool AnyChanges = false;
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// Loop over all instructions in all blocks, from bottom to top, so that it's
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// more likely that chains of dependent but ultimately dead instructions will
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// be cleaned up.
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for (MachineBasicBlock *MBB : post_order(&MF)) {
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LivePhysRegs.addLiveOuts(*MBB);
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// Now scan the instructions and delete dead ones, tracking physreg
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// liveness as we go.
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for (MachineInstr &MI : make_early_inc_range(reverse(*MBB))) {
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// If the instruction is dead, delete it!
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if (MI.isDead(*MRI, &LivePhysRegs)) {
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LLVM_DEBUG(dbgs() << "DeadMachineInstructionElim: DELETING: " << MI);
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// It is possible that some DBG_VALUE instructions refer to this
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// instruction. They will be deleted in the live debug variable
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// analysis.
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MI.eraseFromParent();
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AnyChanges = true;
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++NumDeletes;
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continue;
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}
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LivePhysRegs.stepBackward(MI);
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}
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}
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LivePhysRegs.clear();
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return AnyChanges;
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}
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