Simon Pilgrim 3218570620 [X86] Add shuffle test case for Issue #86068

2024-03-21 17:56:58 +00:00

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AArch64

[AArch64][GlobalISel] Take abs scalar codegen closer to SDAG (#84886)

2024-03-21 09:54:03 +05:30

AMDGPU

Update amdgpu_gfx functions to use s0-s3 for inreg SGPR arguments on targets using scratch instructions for stack #78226 (#81394)

2024-03-21 16:52:08 +05:30

ARC

[ARC] Convert tests to opaque pointers (NFC)

2024-02-06 12:55:16 -08:00

ARM

[ARM] Regenerate some check lines. NFC

2024-03-21 13:45:44 +00:00

AVR

[AVR] Remove earlyclobber from LDDRdPtrQ (#85277)

2024-03-15 19:07:54 +08:00

BPF

[BPF] rename 'arena' to 'address_space' (#85161)

2024-03-14 19:20:06 -07:00

CSKY

[CSKY] Convert tests to opaque pointers (NFC)

2024-02-06 12:54:21 -08:00

DirectX

[DirectX][DXIL] Distinguish return type for overload type resolution. (#85646)

2024-03-20 14:48:16 -04:00

Generic

[NVPTX] support dynamic allocas with PTX alloca instruction (#84585)

2024-03-15 11:51:46 -07:00

Hexagon

Revert "Move assertion for AdjustsStack from PEI to MachineVerifier. (#85698)"

2024-03-20 11:48:30 -04:00

Inputs

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Lanai

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LoongArch

Revert "[llvm][LoongArch] Improve loongarch_lasx_xvpermi_q instrinsic" (#84708)

2024-03-13 11:51:47 +08:00

M68k

[M68k] Fix compilation pipeline check

2024-03-01 14:49:27 -05:00

Mips

MIPS: Support -m(no-)unaligned-access for r6 (#85174)

2024-03-20 14:18:24 +08:00

MIR

[MachineFrameInfo] Refactoring around computeMaxcallFrameSize() (NFC) (#78001)

2024-03-18 10:37:59 -04:00

MLRegAlloc

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MSP430

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NVPTX

[NVPTX] Use PTX prmt for llvm.bswap (#85545)

2024-03-19 15:18:53 -07:00

PowerPC

[PowerPC] Update chain uses when emitting lxsizx (#84892)

2024-03-18 22:31:05 +08:00

RISCV

[RISCV] Use BuildPairF64 and SplitF64 for bitcast i64<->f64 on rv32 regardless of Zfa. (#85982)

2024-03-21 08:52:51 -07:00

SPARC

[Sparc] limit MaxAtomicSizeInBitsSupported to 32 for 32-bit Sparc. (#81655)

2024-02-13 15:40:51 -05:00

SPIRV

[SPIRV] Add __spirv_ builtins for existing instructions (#85654)

2024-03-20 19:28:29 +01:00

SystemZ

Check for all frame instructions in finalize isel. (#85945)

2024-03-21 11:00:08 -04:00

Thumb

Revert "Convert many LivePhysRegs uses to LiveRegUnits (#83905)"

2024-03-07 08:20:26 +00:00

Thumb2

Revert "[ARM] R11 not pushed adjacent to link register with PAC-M and… (#84019)

2024-03-05 14:34:43 +00:00

VE

[DAGCombiner][RISCV] Optimize (zext nneg (truncate X)) if X has known sign bits. (#82227)

2024-02-19 10:45:11 -08:00

WebAssembly

[WebAssembly] Select BUILD_VECTOR with large unsigned lane values (#85880)

2024-03-20 08:42:42 -07:00

WinCFGuard

[Tests] Drop inrange attribute from some tests (NFC)

2024-03-13 11:49:16 +01:00

WinEH

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X86

[X86] Add shuffle test case for Issue #86068

2024-03-21 17:56:58 +00:00

XCore

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Xtensa

[Xtensa] Initial codegen support from IR (#78548)

2024-02-12 17:41:59 +01:00