8246f28237
This patch adds Hardware Transaction Memory (HTM) support supported by ISA 2.07 (POWER8). The intrinsic support is based on GCC one [1], with both 'PowerPC HTM Low Level Built-in Functions' and 'PowerPC HTM High Level Inline Functions' implemented. Along with builtins a new driver switch is added to enable/disable HTM instruction support (-mhtm) and a header with common definitions (mostly to parse the TFHAR register value). The HTM switch also sets a preprocessor builtin HTM. The HTM usage requires a recently newer kernel with PPC HTM enabled. Tested on powerpc64 and powerpc64le. This is send along a llvm patch to enabled the builtins and option switch. [1] https://gcc.gnu.org/onlinedocs/gcc/PowerPC-Hardware-Transactional-Memory-Built-in-Functions.html Phabricator Review: http://reviews.llvm.org/D8248 llvm-svn: 233205
63 lines
1.8 KiB
C
63 lines
1.8 KiB
C
// REQUIRES: powerpc-registered-target
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// RUN: %clang_cc1 -faltivec -target-feature +htm -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
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void test1(long int *r, int code, long int *a, long int *b) {
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// CHECK-LABEL: define void @test1
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r[0] = __builtin_tbegin (0);
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// CHECK: @llvm.ppc.tbegin
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r[1] = __builtin_tbegin (1);
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// CHECK: @llvm.ppc.tbegin
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r[2] = __builtin_tend (0);
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// CHECK: @llvm.ppc.tend
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r[3] = __builtin_tendall ();
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// CHECK: @llvm.ppc.tendall
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r[4] = __builtin_tabort (code);
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// CHECK: @llvm.ppc.tabort
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r[5] = __builtin_tabort (0x1);
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// CHECK: @llvm.ppc.tabort
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r[6] = __builtin_tabortdc (0xf, a[0], b[0]);
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// CHECK: @llvm.ppc.tabortdc
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r[7] = __builtin_tabortdci (0xf, a[1], 0x1);
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// CHECK: @llvm.ppc.tabortdc
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r[8] = __builtin_tabortwc (0xf, a[2], b[2]);
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// CHECK: @llvm.ppc.tabortwc
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r[9] = __builtin_tabortwci (0xf, a[3], 0x1);
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// CHECK: @llvm.ppc.tabortwc
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r[10] = __builtin_tcheck ();
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// CHECK: @llvm.ppc.tcheck
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r[11] = __builtin_trechkpt ();
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// CHECK: @llvm.ppc.trechkpt
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r[12] = __builtin_treclaim (0);
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// CHECK: @llvm.ppc.treclaim
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r[13] = __builtin_tresume ();
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// CHECK: @llvm.ppc.tresume
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r[14] = __builtin_tsuspend ();
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// CHECK: @llvm.ppc.tsuspend
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r[15] = __builtin_tsr (0);
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// CHECK: @llvm.ppc.tsr
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r[16] = __builtin_ttest ();
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// CHECK: @llvm.ppc.ttest
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r[17] = __builtin_get_texasr ();
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// CHECK: @llvm.ppc.get.texasr
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r[18] = __builtin_get_texasru ();
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// CHECK: @llvm.ppc.get.texasru
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r[19] = __builtin_get_tfhar ();
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// CHECK: @llvm.ppc.get.tfhar
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r[20] = __builtin_get_tfiar ();
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// CHECK: @llvm.ppc.get.tfiar
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__builtin_set_texasr (a[21]);
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// CHECK: @llvm.ppc.set.texasr
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__builtin_set_texasru (a[22]);
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// CHECK: @llvm.ppc.set.texasru
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__builtin_set_tfhar (a[23]);
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// CHECK: @llvm.ppc.set.tfhar
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__builtin_set_tfiar (a[24]);
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// CHECK: @llvm.ppc.set.tfiar
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}
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