6b2cca7f8f
This is enough to compile and link but doesn't yet do anything particularly useful. Once an ASM parser and printer are added in the next two patches, the whole thing can be usefully tested. Differential Revision: https://reviews.llvm.org/D23562 llvm-svn: 285770
60 lines
1.9 KiB
C++
60 lines
1.9 KiB
C++
//===-- RISCVMCTargetDesc.cpp - RISCV Target Descriptions -----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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///
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/// This file provides RISCV-specific target descriptions.
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///
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//===----------------------------------------------------------------------===//
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#include "RISCVMCTargetDesc.h"
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#include "RISCVMCAsmInfo.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/TargetRegistry.h"
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#define GET_INSTRINFO_MC_DESC
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#include "RISCVGenInstrInfo.inc"
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#define GET_REGINFO_MC_DESC
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#include "RISCVGenRegisterInfo.inc"
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using namespace llvm;
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static MCInstrInfo *createRISCVMCInstrInfo() {
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MCInstrInfo *X = new MCInstrInfo();
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InitRISCVMCInstrInfo(X);
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return X;
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}
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static MCRegisterInfo *createRISCVMCRegisterInfo(const Triple &TT) {
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MCRegisterInfo *X = new MCRegisterInfo();
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InitRISCVMCRegisterInfo(X, RISCV::X1_32);
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return X;
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}
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static MCAsmInfo *createRISCVMCAsmInfo(const MCRegisterInfo &MRI,
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const Triple &TT) {
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MCAsmInfo *MAI = new RISCVMCAsmInfo(TT);
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return MAI;
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}
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extern "C" void LLVMInitializeRISCVTargetMC() {
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for (Target *T : {&getTheRISCV32Target(), &getTheRISCV64Target()}) {
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RegisterMCAsmInfoFn X(*T, createRISCVMCAsmInfo);
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TargetRegistry::RegisterMCInstrInfo(*T, createRISCVMCInstrInfo);
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TargetRegistry::RegisterMCRegInfo(*T, createRISCVMCRegisterInfo);
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TargetRegistry::RegisterMCAsmBackend(*T, createRISCVAsmBackend);
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TargetRegistry::RegisterMCCodeEmitter(*T, createRISCVMCCodeEmitter);
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}
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}
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