llvm-project/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sin.f16.ll
Konstantin Zhuravlyov f86e4b7266 [AMDGPU] Add f16 support (VI+)
Differential Revision: https://reviews.llvm.org/D25975

llvm-svn: 286753
2016-11-13 07:01:11 +00:00

19 lines
572 B
LLVM

; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
declare half @llvm.amdgcn.sin.f16(half %a)
; GCN-LABEL: {{^}}sin_f16
; GCN: buffer_load_ushort v[[A_F16:[0-9]+]]
; VI: v_sin_f16_e32 v[[R_F16:[0-9]+]], v[[A_F16]]
; GCN: buffer_store_short v[[R_F16]]
; GCN: s_endpgm
define void @sin_f16(
half addrspace(1)* %r,
half addrspace(1)* %a) {
entry:
%a.val = load half, half addrspace(1)* %a
%r.val = call half @llvm.amdgcn.sin.f16(half %a.val)
store half %r.val, half addrspace(1)* %r
ret void
}