7b0e25b7ad
Summary: When finding a match for a merge and collecting the instructions that must be moved, keep in mind that the instruction we merge might actually use one of the defs that are being moved. Fixes piglit spec/arb_enhanced_layouts/execution/component-layout/vs-tcs-load-output[-indirect]. The fact that the ds_read in the test case is not eliminated suggests that there might be another problem related to alias analysis, but that's a separate problem: this pass should still work correctly even when earlier optimization passes missed something or were disabled. Reviewers: tstellarAMD, arsenm Subscribers: kzhuravl, wdng, yaxunl, llvm-commits, tony-tye Differential Revision: https://reviews.llvm.org/D25829 llvm-svn: 285273
24 lines
832 B
LLVM
24 lines
832 B
LLVM
; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s
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; CHECK-LABEL: {{^}}test1:
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; CHECK: ds_write_b32
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; CHECK: ds_read_b32
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; CHECK: ds_write_b32
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define amdgpu_vs void @test1(i32 %v) #0 {
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%p0 = getelementptr i32, i32 addrspace(3)* null, i32 0
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%p1 = getelementptr i32, i32 addrspace(3)* null, i32 1
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store i32 %v, i32 addrspace(3)* %p0
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call void @llvm.SI.tbuffer.store.i32(<16 x i8> undef, i32 %v, i32 1, i32 undef, i32 undef, i32 0, i32 4, i32 4, i32 1, i32 0, i32 1, i32 1, i32 0)
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%w = load i32, i32 addrspace(3)* %p0
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store i32 %w, i32 addrspace(3)* %p1
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ret void
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}
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declare void @llvm.SI.tbuffer.store.i32(<16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) #0
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attributes #0 = { nounwind }
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