Stanislav Mekhanoshin 33fb23f728 [AMDGPU] Merge flat with global in the SILoadStoreOptimizer ...

Flat can be merged with flat global since address cast is a no-op.
A combined memory operation needs to be promoted to flat.

Differential Revision: https://reviews.llvm.org/D120431

2022-03-09 10:04:37 -08:00

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AArch64

[AArch64] Add test for D120481 with multiple uses.

2022-03-08 11:11:03 +00:00

AMDGPU

[AMDGPU] Merge flat with global in the SILoadStoreOptimizer

2022-03-09 10:04:37 -08:00

ARC

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ARM

[LegalizeTypes][ARM][X86] Change ExpandIntRes_ABS to use sra+xor+sub.

2022-03-07 11:28:32 -08:00

AVR

[AVR] Fix a potential assert failure

2022-02-11 02:25:58 +00:00

BPF

[BPF] Fix tests that fail if /tmp/t.c exists

2022-02-25 14:55:53 -08:00

CSKY

[CSKY] Add inline asm constraints and related codegen support

2022-02-07 17:45:37 +08:00

Generic

[CodeGen][test] XFAIL CodeGen/Generic/ForceStackAlign.ll on SPARC

2022-02-08 08:57:59 +01:00

Hexagon

[test] Modify some tests to remove implicit -basic-aa in legacy PM RUN lines

2022-03-08 14:35:06 -08:00

Inputs

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Lanai

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LoongArch

[LoongArch] Add EncoderMethods for transformed immediate operands

2022-03-07 16:47:26 +08:00

M68k

m68k: Support bit shifts on 64-bit integers

2022-02-12 06:11:49 +08:00

Mips

[Mips] support "sp" named register

2022-03-03 13:53:36 -08:00

MIR

[AMDGPU] Move call clobbered return address registers s[30:31] to callee saved range

2022-03-09 12:18:02 +05:30

MLRegalloc

[NFC] Fixing test requirements I broke

2022-02-09 09:11:34 -06:00

MSP430

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NVPTX

[NVPTX] Fix nvvm.match.sync*.i64 intrinsics return type (i64 -> i32)

2022-03-01 12:26:16 +02:00

PowerPC

[PowerPC] Fix the none tail call in scalar MASS conversion

2022-03-08 08:59:17 -08:00

RISCV

[LegalizeTypes][VP] Add widening and splitting support for VP_FMA.

2022-03-08 09:59:59 -08:00

SPARC

[Sparc] Add tail call support

2022-03-08 13:50:54 +01:00

SystemZ

[SystemZ] [z/OS] Add support for generating huge (1 MiB) stack frames in XPLINK64

2022-02-25 02:37:08 -05:00

Thumb

[SelectionDAG][RISCV][ARM][PowerPC][X86][WebAssembly] Change default abs expansion to use sra (X, size(X)-1); sub (xor (X, Y), Y).

2022-02-20 21:11:23 -08:00

Thumb2

[LegalizeTypes][ARM][X86] Change ExpandIntRes_ABS to use sra+xor+sub.

2022-03-07 11:28:32 -08:00

VE

[VE] Split v512.32 load store into interleaved v256.32 ops

2022-03-07 17:38:38 +01:00

WebAssembly

[WebAssembly] Covert llvm/test/MC/WebAssembly/reloc-code.ll to asm. NFC

2022-02-25 07:12:32 -08:00

WinCFGuard

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WinEH

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X86

[X86] Add shift identity select tests

2022-03-09 14:26:58 +00:00

XCore

[CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC.

2022-02-18 16:10:56 +00:00