shylie/llvm-project
1
0
Fork 0
Code Issues Pull Requests Actions 6 Packages Projects Releases Wiki Activity
llvm-project/llvm/test/CodeGen
History
Zlatko Buljan de0bbe6d1c [mips][microMIPS] Add CodeGen support for SUBU16, SUB, SUBU, DSUB and DSUBU instructions 
Differential Revision: http://reviews.llvm.org/D16676

llvm-svn: 267694
2016-04-27 11:31:44 +00:00
..
AArch64
[AArch64] Expand v1i64 and v2i64 ctlz.
2016-04-26 05:26:51 +00:00
AMDGPU
[AMDGPU] Reserve VGPRs for trap handler usage if instructed
2016-04-26 15:43:14 +00:00
ARM
[ARM] Expand vector ctlz_zero_undef so it becomes ctlz.
2016-04-26 05:04:37 +00:00
BPF
BPF: emit an error message for unsupported signed division operation
2016-03-18 22:02:47 +00:00
CPP
Fix CPP Backend for GEP API changes for opaque pointer types
2015-09-08 18:42:29 +00:00
Generic
Introduce llvm.load.relative intrinsic.
2016-04-22 21:18:02 +00:00
Hexagon
[Tail duplication] Handle source registers with subregisters
2016-04-26 18:36:34 +00:00
Inputs
[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.
2016-04-15 15:57:41 +00:00
Lanai
[lanai] Add subword scheduling itineraries.
2016-04-20 18:28:55 +00:00
Mips
[mips][microMIPS] Add CodeGen support for SUBU16, SUB, SUBU, DSUB and DSUBU instructions
2016-04-27 11:31:44 +00:00
MIR
tests: tweak MIR for ARM tests to correct MI issues
2016-04-26 17:54:21 +00:00
MSP430
MSP430InstrInfo::loadRegFromStackSlot forgets to set register def.
2016-02-24 15:15:02 +00:00
NVPTX
[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.
2016-04-15 15:57:41 +00:00
PowerPC
[ppc64] fix bug in prologue that mfocrf's cr operand should be explict state instead of implicit
2016-04-27 02:59:28 +00:00
SPARC
[SPARC] [SSP] Add support for LOAD_STACK_GUARD.
2016-04-26 10:37:14 +00:00
SystemZ
[SystemZ] [SSP] Add support for LOAD_STACK_GUARD.
2016-04-24 13:57:49 +00:00
Thumb
[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.
2016-04-15 15:57:41 +00:00
Thumb2
ARM: use r7 as the frame-pointer on all MachO targets.
2016-04-11 22:27:40 +00:00
WebAssembly
[WebAssembly] Account for implicit operands when computing operand indices.
2016-04-26 01:40:56 +00:00
WinEH
[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.
2016-04-15 15:57:41 +00:00
X86
[X86] Don't assume that MMX extractelts are from index 0.
2016-04-27 01:35:29 +00:00
XCore
[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.
2016-04-15 15:57:41 +00:00