b3a9e8f7c0
Future patches will remove some redundant instructions for runtime checks, which brings this test case slightly below the default limit of 128. Force a lower limit to preserve the original spirit of the test (checking that no interleaving happens if the number of checks is above he threshold)
76 lines
2.8 KiB
LLVM
76 lines
2.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 -S -passes=loop-vectorize -vectorize-memory-check-threshold=60 < %s -o - | FileCheck %s
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; The case will do aggressive interleave on PowerPC, resulting in a lot of memory checks.
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; (On the A2, always unroll aggressively. In fact, if aggressive interleaving is enabled,
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; similar issues may occur on other targets).
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; Interleaving should also be restricted by the threshold of memory checks similar to VF.
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; (e.g., runtime-memory-check-threshold, default 8).
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; CHECK-LABEL: @eddy_diff_caleddy_
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; CHECK-NOT: vector.memcheck
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define fastcc void @eddy_diff_caleddy_(ptr %wet_cl, i64 %0, i32 %ncol.cast.val) {
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entry:
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%trip.count = add nuw i32 %ncol.cast.val, 1
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%wide.trip.count = zext i32 %ncol.cast.val to i64
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%1 = shl i64 %0, 1
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%2 = mul i64 %0, 3
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%3 = shl i64 %0, 2
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%4 = mul i64 %0, 5
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%5 = mul i64 %0, 6
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%6 = mul i64 %0, 7
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%7 = shl i64 %0, 3
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%8 = mul i64 %0, 9
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%9 = mul i64 %0, 10
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%10 = mul i64 %0, 11
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%11 = mul i64 %0, 12
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br label %loop.body
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loop.body:
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%indvars.iv774 = phi i64 [ 0, %entry ], [ %indvars.iv.next775, %loop.body ]
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%12 = add nsw i64 %indvars.iv774, -5
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%13 = add i64 %12, %0
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%14 = getelementptr i64, ptr %wet_cl, i64 %13
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store double 0.000000e+00, ptr %14, align 8
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%15 = add i64 %12, %1
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%16 = getelementptr i64, ptr %wet_cl, i64 %15
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store double 0.000000e+00, ptr %16, align 8
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%17 = add i64 %12, %2
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%18 = getelementptr i64, ptr %wet_cl, i64 %17
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store double 0.000000e+00, ptr %18, align 8
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%19 = add i64 %12, %3
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%20 = getelementptr i64, ptr %wet_cl, i64 %19
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store double 0.000000e+00, ptr %20, align 8
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%21 = add i64 %12, %4
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%22 = getelementptr i64, ptr %wet_cl, i64 %21
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store double 0.000000e+00, ptr %22, align 8
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%23 = add i64 %12, %5
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%24 = getelementptr i64, ptr %wet_cl, i64 %23
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store double 0.000000e+00, ptr %24, align 8
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%25 = add i64 %12, %6
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%26 = getelementptr i64, ptr %wet_cl, i64 %25
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store double 0.000000e+00, ptr %26, align 8
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%27 = add i64 %12, %7
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%28 = getelementptr i64, ptr %wet_cl, i64 %27
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store double 0.000000e+00, ptr %28, align 8
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%29 = add i64 %12, %8
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%30 = getelementptr i64, ptr %wet_cl, i64 %29
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store double 0.000000e+00, ptr %30, align 8
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%31 = add i64 %12, %9
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%32 = getelementptr i64, ptr %wet_cl, i64 %31
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store double 0.000000e+00, ptr %32, align 8
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%33 = add i64 %12, %10
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%34 = getelementptr i64, ptr %wet_cl, i64 %33
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store double 0.000000e+00, ptr %34, align 8
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%35 = add i64 %12, %11
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%36 = getelementptr i64, ptr %wet_cl, i64 %35
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store double 0.000000e+00, ptr %36, align 8
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%indvars.iv.next775 = add nuw nsw i64 %indvars.iv774, 1
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%exitcond778.not = icmp eq i64 %indvars.iv.next775, %wide.trip.count
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br i1 %exitcond778.not, label %loop.end, label %loop.body
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loop.end:
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ret void
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}
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