9e9907f1cf
Similar to 806761a7629df268c8aed49657aeccffa6bca449. For IR files without a target triple, -mtriple= specifies the full target triple while -march= merely sets the architecture part of the default target triple, leaving a target triple which may not make sense, e.g. amdgpu-apple-darwin. Therefore, -march= is error-prone and not recommended for tests without a target triple. The issue has been benign as we recognize $unknown-apple-darwin as ELF instead of rejecting it outrightly. This patch changes AMDGPU tests to not rely on the default OS/environment components. Tests that need fixes are not changed: ``` LLVM :: CodeGen/AMDGPU/fabs.f64.ll LLVM :: CodeGen/AMDGPU/fabs.ll LLVM :: CodeGen/AMDGPU/floor.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.ll LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll LLVM :: CodeGen/AMDGPU/schedule-if-2.ll ```
40 lines
1.1 KiB
LLVM
40 lines
1.1 KiB
LLVM
; RUN: llc < %s -mtriple=amdgcn -verify-machineinstrs | FileCheck %s
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; This tests that the llvm.SI.end.cf intrinsic is not inserted into the
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; loop block. This intrinsic will be lowered to s_or_b64 by the code
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; generator.
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; CHECK-LABEL: {{^}}test:
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; This is was lowered from the llvm.SI.end.cf intrinsic:
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; CHECK: s_or_b64 exec, exec
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; CHECK: [[LOOP_LABEL:.L[0-9A-Za-z_]+]]: ; %loop{{$}}
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; CHECK-NOT: s_or_b64 exec, exec
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; CHECK: s_cbranch_execnz [[LOOP_LABEL]]
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define amdgpu_kernel void @test(ptr addrspace(1) %out) {
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entry:
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%cond = call i32 @llvm.amdgcn.workitem.id.x() #0
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%tmp0 = icmp eq i32 %cond, 0
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br i1 %tmp0, label %if, label %loop
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if:
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store i32 0, ptr addrspace(1) %out
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br label %loop
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loop:
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%tmp1 = phi i32 [0, %entry], [0, %if], [%inc, %loop]
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%inc = add i32 %tmp1, %cond
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%tmp2 = icmp ugt i32 %inc, 10
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br i1 %tmp2, label %done, label %loop
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done:
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%tmp3 = getelementptr i32, ptr addrspace(1) %out, i64 1
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store i32 %inc, ptr addrspace(1) %tmp3
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ret void
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}
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declare i32 @llvm.amdgcn.workitem.id.x() #0
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attributes #0 = { nounwind readnone }
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