9e9907f1cf
Similar to 806761a7629df268c8aed49657aeccffa6bca449. For IR files without a target triple, -mtriple= specifies the full target triple while -march= merely sets the architecture part of the default target triple, leaving a target triple which may not make sense, e.g. amdgpu-apple-darwin. Therefore, -march= is error-prone and not recommended for tests without a target triple. The issue has been benign as we recognize $unknown-apple-darwin as ELF instead of rejecting it outrightly. This patch changes AMDGPU tests to not rely on the default OS/environment components. Tests that need fixes are not changed: ``` LLVM :: CodeGen/AMDGPU/fabs.f64.ll LLVM :: CodeGen/AMDGPU/fabs.ll LLVM :: CodeGen/AMDGPU/floor.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.ll LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll LLVM :: CodeGen/AMDGPU/schedule-if-2.ll ```
51 lines
1.4 KiB
LLVM
51 lines
1.4 KiB
LLVM
; RUN: llc -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -mtriple=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -mtriple=r600 -mcpu=redwood < %s | FileCheck %s -check-prefix=R600 -check-prefix=FUNC
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; FUNC-LABEL: {{^}}rint_f32:
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; R600: RNDNE
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; SI: v_rndne_f32_e32
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define amdgpu_kernel void @rint_f32(ptr addrspace(1) %out, float %in) {
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entry:
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%0 = call float @llvm.rint.f32(float %in) #0
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store float %0, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}rint_v2f32:
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; R600: RNDNE
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; R600: RNDNE
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; SI: v_rndne_f32_e32
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; SI: v_rndne_f32_e32
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define amdgpu_kernel void @rint_v2f32(ptr addrspace(1) %out, <2 x float> %in) {
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entry:
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%0 = call <2 x float> @llvm.rint.v2f32(<2 x float> %in) #0
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store <2 x float> %0, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}rint_v4f32:
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; R600: RNDNE
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; R600: RNDNE
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; R600: RNDNE
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; R600: RNDNE
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; SI: v_rndne_f32_e32
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; SI: v_rndne_f32_e32
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; SI: v_rndne_f32_e32
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; SI: v_rndne_f32_e32
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define amdgpu_kernel void @rint_v4f32(ptr addrspace(1) %out, <4 x float> %in) {
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entry:
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%0 = call <4 x float> @llvm.rint.v4f32(<4 x float> %in) #0
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store <4 x float> %0, ptr addrspace(1) %out
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ret void
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}
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declare float @llvm.rint.f32(float) #0
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declare <2 x float> @llvm.rint.v2f32(<2 x float>) #0
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declare <4 x float> @llvm.rint.v4f32(<4 x float>) #0
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attributes #0 = { nounwind readnone }
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