9e9907f1cf
Similar to 806761a7629df268c8aed49657aeccffa6bca449. For IR files without a target triple, -mtriple= specifies the full target triple while -march= merely sets the architecture part of the default target triple, leaving a target triple which may not make sense, e.g. amdgpu-apple-darwin. Therefore, -march= is error-prone and not recommended for tests without a target triple. The issue has been benign as we recognize $unknown-apple-darwin as ELF instead of rejecting it outrightly. This patch changes AMDGPU tests to not rely on the default OS/environment components. Tests that need fixes are not changed: ``` LLVM :: CodeGen/AMDGPU/fabs.f64.ll LLVM :: CodeGen/AMDGPU/fabs.ll LLVM :: CodeGen/AMDGPU/floor.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.ll LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll LLVM :: CodeGen/AMDGPU/schedule-if-2.ll ```
35 lines
973 B
LLVM
35 lines
973 B
LLVM
; RUN: llc < %s -mtriple=r600 -mcpu=redwood | FileCheck %s
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; RUN: llc < %s -mtriple=r600 -mcpu=cayman | FileCheck %s
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; CHECK: {{^}}test:
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; CHECK: BIT_ALIGN_INT T{{[0-9]}}.X
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; CHECK: BIT_ALIGN_INT T{{[0-9]}}.Y
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; CHECK: BIT_ALIGN_INT T{{[0-9]}}.Z
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; CHECK: BIT_ALIGN_INT * T{{[0-9]}}.W
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define amdgpu_kernel void @test(ptr addrspace(1) %out, i32 %x_arg, i32 %y_arg, i32 %z_arg, i32 %w_arg, i32 %e) {
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entry:
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%shl = sub i32 32, %e
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%x = add i32 %x_arg, 1
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%x.0 = shl i32 %x, %shl
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%x.1 = lshr i32 %x, %e
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%x.2 = or i32 %x.0, %x.1
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%y = add i32 %y_arg, 1
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%y.0 = shl i32 %y, %shl
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%y.1 = lshr i32 %y, %e
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%y.2 = or i32 %y.0, %y.1
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%z = add i32 %z_arg, 1
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%z.0 = shl i32 %z, %shl
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%z.1 = lshr i32 %z, %e
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%z.2 = or i32 %z.0, %z.1
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%w = add i32 %w_arg, 1
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%w.0 = shl i32 %w, %shl
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%w.1 = lshr i32 %w, %e
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%w.2 = or i32 %w.0, %w.1
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%xy = or i32 %x.2, %y.2
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%zw = or i32 %z.2, %w.2
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%xyzw = or i32 %xy, %zw
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store i32 %xyzw, ptr addrspace(1) %out
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ret void
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}
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