9e9907f1cf
Similar to 806761a7629df268c8aed49657aeccffa6bca449. For IR files without a target triple, -mtriple= specifies the full target triple while -march= merely sets the architecture part of the default target triple, leaving a target triple which may not make sense, e.g. amdgpu-apple-darwin. Therefore, -march= is error-prone and not recommended for tests without a target triple. The issue has been benign as we recognize $unknown-apple-darwin as ELF instead of rejecting it outrightly. This patch changes AMDGPU tests to not rely on the default OS/environment components. Tests that need fixes are not changed: ``` LLVM :: CodeGen/AMDGPU/fabs.f64.ll LLVM :: CodeGen/AMDGPU/fabs.ll LLVM :: CodeGen/AMDGPU/floor.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.ll LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll LLVM :: CodeGen/AMDGPU/schedule-if-2.ll ```
21 lines
767 B
LLVM
21 lines
767 B
LLVM
; RUN: llc -verify-machineinstrs -mtriple=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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; RUN: llc -verify-machineinstrs -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefixes=GCN,SI -check-prefix=FUNC %s
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; RUN: llc -verify-machineinstrs -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -check-prefixes=GCN,VI -check-prefix=FUNC %s
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; FUNC-LABEL: {{^}}selectcc_i64:
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; EG: XOR_INT
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; EG: XOR_INT
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; EG: OR_INT
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; EG: CNDE_INT
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; EG: CNDE_INT
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; SI: v_cmp_eq_u64
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; VI: s_cmp_eq_u64
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; GCN: s_cselect_b32
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define amdgpu_kernel void @selectcc_i64(ptr addrspace(1) %out, i64 %lhs, i64 %rhs, i64 %true, i64 %false) {
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entry:
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%0 = icmp eq i64 %lhs, %rhs
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%1 = select i1 %0, i64 %true, i64 %false
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store i64 %1, ptr addrspace(1) %out
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ret void
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}
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