8cc6c2e80f
andorbitset.ll is interesting since it directly depends on the difference between poison and undef. Not sure it's useful to keep the version using poison, I assume none of this code makes it to codegen. si-spill-cf.ll was also a nasty case, which I doubt has been reproducing its original issue for a very long time. I had to reclaim an older version, replace some of the poison uses, and run simplify-cfg. There's a very slight change in the final CFG with this, but final the output is approximately the same as it used to be.
106 lines
3.8 KiB
LLVM
106 lines
3.8 KiB
LLVM
; RUN: opt -mtriple=amdgcn-- -S -structurizecfg -si-annotate-control-flow -simplifycfg-require-and-preserve-domtree=1 %s | FileCheck -check-prefix=OPT %s
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; RUN: opt -mtriple=amdgcn-- -S -passes=structurizecfg,si-annotate-control-flow -simplifycfg-require-and-preserve-domtree=1 %s | FileCheck -check-prefix=OPT %s
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; RUN: llc -mtriple=amdgcn -verify-machineinstrs -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck -check-prefix=GCN %s
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; OPT-LABEL: @annotate_unreachable_noloop(
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; OPT-NOT: call i1 @llvm.amdgcn.loop
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; GCN-LABEL: {{^}}annotate_unreachable_noloop:
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; GCN: s_cbranch_scc1
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; GCN-NOT: s_endpgm
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; GCN: .Lfunc_end0
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define amdgpu_kernel void @annotate_unreachable_noloop(ptr addrspace(1) noalias nocapture readonly %arg) #0 {
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bb:
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%tmp = tail call i32 @llvm.amdgcn.workitem.id.x()
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br label %bb1
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bb1: ; preds = %bb
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%tmp2 = sext i32 %tmp to i64
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%tmp3 = getelementptr inbounds <4 x float>, ptr addrspace(1) %arg, i64 %tmp2
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%tmp4 = load <4 x float>, ptr addrspace(1) %tmp3, align 16
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br i1 poison, label %bb5, label %bb3
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bb3: ; preds = %bb1
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%tmp6 = extractelement <4 x float> %tmp4, i32 2
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%tmp7 = fcmp olt float %tmp6, 0.000000e+00
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br i1 %tmp7, label %bb4, label %bb5 ; crash goes away if these are swapped
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bb4: ; preds = %bb3
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unreachable
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bb5: ; preds = %bb3, %bb1
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unreachable
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}
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; OPT-LABEL: @annotate_ret_noloop(
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; OPT-NOT: call i1 @llvm.amdgcn.loop
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; GCN-LABEL: {{^}}annotate_ret_noloop:
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; GCN: load_dwordx4
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; GCN: v_cmp_nlt_f32
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; GCN: s_and_saveexec_b64
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; GCN-NEXT: s_endpgm
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; GCN: .Lfunc_end
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define amdgpu_kernel void @annotate_ret_noloop(ptr addrspace(1) noalias nocapture readonly %arg) #0 {
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bb:
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%tmp = tail call i32 @llvm.amdgcn.workitem.id.x()
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br label %bb1
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bb1: ; preds = %bb
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%tmp2 = sext i32 %tmp to i64
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%tmp3 = getelementptr inbounds <4 x float>, ptr addrspace(1) %arg, i64 %tmp2
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%tmp4 = load <4 x float>, ptr addrspace(1) %tmp3, align 16
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%tmp5 = extractelement <4 x float> %tmp4, i32 1
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store volatile <4 x float> %tmp4, ptr addrspace(1) poison
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%cmp = fcmp ogt float %tmp5, 1.0
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br i1 %cmp, label %bb5, label %bb3
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bb3: ; preds = %bb1
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%tmp6 = extractelement <4 x float> %tmp4, i32 2
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%tmp7 = fcmp olt float %tmp6, 0.000000e+00
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br i1 %tmp7, label %bb4, label %bb5 ; crash goes away if these are swapped
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bb4: ; preds = %bb3
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ret void
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bb5: ; preds = %bb3, %bb1
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ret void
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}
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; OPT-LABEL: @uniform_annotate_ret_noloop(
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; OPT-NOT: call i1 @llvm.amdgcn.loop
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; GCN-LABEL: {{^}}uniform_annotate_ret_noloop:
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; GCN: s_cbranch_scc1
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; GCN: s_endpgm
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; GCN: .Lfunc_end
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define amdgpu_kernel void @uniform_annotate_ret_noloop(ptr addrspace(1) noalias nocapture readonly %arg, i32 %tmp) #0 {
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bb:
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br label %bb1
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bb1: ; preds = %bb
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%tmp2 = sext i32 %tmp to i64
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%tmp3 = getelementptr inbounds <4 x float>, ptr addrspace(1) %arg, i64 %tmp2
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%tmp4 = load <4 x float>, ptr addrspace(1) %tmp3, align 16
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%undef = freeze i1 poison
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br i1 %undef, label %bb5, label %bb3
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bb3: ; preds = %bb1
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%tmp6 = extractelement <4 x float> %tmp4, i32 2
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%tmp7 = fcmp olt float %tmp6, 0.000000e+00
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br i1 %tmp7, label %bb4, label %bb5 ; crash goes away if these are swapped
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bb4: ; preds = %bb3
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ret void
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bb5: ; preds = %bb3, %bb1
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ret void
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}
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declare i32 @llvm.amdgcn.workitem.id.x() #1
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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