Pravin Jagtap e6d16f93b3
[AMDGPU] Allow unaligned VGPR for ds_read_b96_tr_b6 (#125169)
All load transpose instructions follow gfx950 standard of even aligned
VGPR except ds_read_b96_tr_b6, which allows unaligned VGPR.

Co-authored-by: Sirish Pande
[Sirish.Pande@amd.com](mailto:Sirish.Pande@amd.com)
2025-01-31 12:23:48 +05:30
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