Amara Emerson e72cfd938f Rename the VECREDUCE_STRICT_{FADD,FMUL} SDNodes to VECREDUCE_SEQ_{FADD,FMUL}. ...

The STRICT was causing unnecessary confusion. I think SEQ is a more accurate
name for what they actually do, and the other obvious option of "ORDERED"
has the issue of already having a meaning in FP contexts.

Differential Revision: https://reviews.llvm.org/D88791

2020-10-07 10:45:09 -07:00

..

CMakeLists.txt

[cmake] Explicitly mark libraries defined in lib/ as "Component Libraries"

2019-11-21 10:48:08 -08:00

DAGCombiner.cpp

[SVE][CodeGen] Fix DAGCombiner::ForwardStoreValueToDirectLoad for scalable vectors

2020-10-06 08:04:03 +01:00

FastISel.cpp

Fix some clang-tidy bugprone-argument-comment issues

2020-09-19 20:41:25 -07:00

FunctionLoweringInfo.cpp

[Statepoint] Consolidate relocation type tracking [NFC]

2020-07-29 11:45:31 -07:00

InstrEmitter.cpp

[Statepoints] Change statepoint machine instr format to better suit VReg lowering.

2020-10-06 17:40:29 +07:00

InstrEmitter.h

InstrEmitter.h - reduce SelectionDAG.h include to SelectionDAGNodes.h include.

2020-04-19 11:52:31 +01:00

LegalizeDAG.cpp

[SelectionDAG] Make sure FMF are propagated when getSetcc canonicalizes FP constants to RHS.

2020-10-05 14:55:23 -07:00

LegalizeFloatTypes.cpp

[SelectionDAG] Make sure FMF are propagated when getSetcc canonicalizes FP constants to RHS.

2020-10-05 14:55:23 -07:00

LegalizeIntegerTypes.cpp

[SelectionDAG][X86][ARM][AArch64] Add ISD opcode for __builtin_parity. Expand it to shifts and xors.

2020-09-12 11:42:18 -07:00

LegalizeTypes.cpp

[AMDGPU] Add v3f16/v3i16 support to SDag

2020-09-16 17:20:27 +02:00

LegalizeTypes.h

[DAG] Remove DAGTypeLegalizer::GenWidenVectorTruncStores (PR42046)

2020-09-22 17:24:45 +01:00

LegalizeTypesGeneric.cpp

[CodeGen] Refactor getMemBasePlusOffset & getObjectPtrOffset to accept a TypeSize

2020-08-11 12:17:10 +01:00

LegalizeVectorOps.cpp

[Intrinsic] Add sshl.sat/ushl.sat, saturated shift intrinsics.

2020-08-07 15:09:24 +02:00

LegalizeVectorTypes.cpp

[SVE][CodeGen] Fix TypeSize/ElementCount related warnings in sve-split-store.ll

2020-10-05 19:27:00 +01:00

LLVMBuild.txt

…

ResourcePriorityQueue.cpp

ResourcePriorityQueue.h - reduce unnecessary includes to forward declarations. NFC.

2020-05-26 19:22:14 +01:00

ScheduleDAGFast.cpp

Revert "[NFC][ScheduleDAG] Remove unused EntrySU SUnit"

2020-09-21 13:33:05 +02:00

ScheduleDAGRRList.cpp

Revert "[NFC][ScheduleDAG] Remove unused EntrySU SUnit"

2020-09-21 13:33:05 +02:00

ScheduleDAGSDNodes.cpp

Revert "[NFC][ScheduleDAG] Remove unused EntrySU SUnit"

2020-09-21 13:33:05 +02:00

ScheduleDAGSDNodes.h

DAG: Use Register

2020-04-08 13:44:31 -04:00

ScheduleDAGVLIW.cpp

Revert "[NFC][ScheduleDAG] Remove unused EntrySU SUnit"

2020-09-21 13:33:05 +02:00

SDNodeDbgValue.h

…

SelectionDAG.cpp

[SVE][CodeGen] Fix TypeSize/ElementCount related warnings in sve-split-store.ll

2020-10-05 19:27:00 +01:00

SelectionDAGAddressAnalysis.cpp

Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each

2019-10-19 01:31:09 +00:00

SelectionDAGBuilder.cpp

Rename the VECREDUCE_STRICT_{FADD,FMUL} SDNodes to VECREDUCE_SEQ_{FADD,FMUL}.

2020-10-07 10:45:09 -07:00

SelectionDAGBuilder.h

[SystemZ] Optimize bcmp calls (PR47420)

2020-09-25 17:55:39 +02:00

SelectionDAGDumper.cpp

Rename the VECREDUCE_STRICT_{FADD,FMUL} SDNodes to VECREDUCE_SEQ_{FADD,FMUL}.

2020-10-07 10:45:09 -07:00

SelectionDAGISel.cpp

[SDag] Verify DAG divergence after dumping. NFC.

2020-09-29 14:05:07 +01:00

SelectionDAGPrinter.cpp

Utility to dump .dot representation of SelectionDAG without firing viewer

2020-06-04 11:51:48 +05:30

SelectionDAGTargetInfo.cpp

…

StatepointLowering.cpp

[Statepoints] Change statepoint machine instr format to better suit VReg lowering.

2020-10-06 17:40:29 +07:00

StatepointLowering.h

[Statepoint] Consolidate relocation type tracking [NFC]

2020-07-29 11:45:31 -07:00

TargetLowering.cpp

[SDag] SimplifyDemandedBits: simplify to FP constant if all bits known

2020-10-07 09:24:38 +01:00