llvm-project/lld/test/ELF/riscv-relax-emit-relocs.s
Fangrui Song 3769ce013b
MC: Refine ALIGN relocation conditions
Each section now tracks the index of the first linker-relaxable
fragment, enabling two changes:

* Delete redundant ALIGN relocations before the first linker-relaxable
  instruction in a section. The primary example is the offset 0
  R_RISCV_ALIGN relocation for a text section aligned by 4.
* For alignments larger than the NOP size after the first
  linker-relaxable instruction, ALIGN relocations are now generated, even in
  norelax regions. This fixes the issue #150159.

The new test llvm/test/MC/RISCV/Relocations/align-after-relax.s
verifies the required ALIGN in a norelax region following
linker-relaxable instructions.
By using a fragment index within the subsection (which is less than or
equal to the section's index), the implementation may generate redundant
ALIGN relocations in lower-numbered subsections before the first
linker-relaxable instruction.

align-option-relax.s demonstrates the ALIGN optimization.
Add an initial `call` to a few tests to prevent the ALIGN optimization.

---

When the alignment exceeds 2, we insert $alignment-2 bytes of NOPs, even
in non-RVC code. This enables non-RVC code following RVC code to handle
a 2-byte adjustment without requiring an additional state in MCSection
or AsmParser.

```
.globl _start
_start:
// GNU ld can relax this to  6505          lui     a0, 0x1
// LLD hasn't implemented this transformation.
  lui a0, %hi(foo)

.option push
.option norelax
.option norvc
// Now we generate R_RISCV_ALIGN with addend 2, even if this is a norvc region.
.balign 4
b0:
  .word 0x3a393837
.option pop
foo:
```

Pull Request: https://github.com/llvm/llvm-project/pull/150816
2025-08-07 19:16:58 -07:00

70 lines
2.3 KiB
ArmAsm

# REQUIRES: riscv
## Test that we can handle --emit-relocs while relaxing.
# RUN: rm -rf %t && mkdir %t && cd %t
# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+relax %s -o 32.o -riscv-align-rvc=0
# RUN: ld.lld -Ttext=0x10000 --emit-relocs 32.o -o 32
# RUN: llvm-objdump -dr --no-show-raw-insn -M no-aliases 32 | FileCheck %s
# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+relax %s -o 64.o -riscv-align-rvc=0
# RUN: ld.lld -Ttext=0x10000 --emit-relocs 64.o -o 64
# RUN: llvm-objdump -dr --no-show-raw-insn -M no-aliases 64 | FileCheck %s
## -r should keep original relocations.
# RUN: ld.lld -r 64.o -o 64.r
# RUN: llvm-objdump -dr --no-show-raw-insn -M no-aliases 64.r | FileCheck %s --check-prefix=CHECKR
## --no-relax should keep original relocations.
# RUN: ld.lld --emit-relocs --no-relax 64.o -o 64.norelax
# RUN: llvm-objdump -dr --no-show-raw-insn -M no-aliases 64.norelax | FileCheck %s --check-prefix=CHECKNORELAX
# CHECK: <_start>:
# CHECK-NEXT: jal ra, 0x10008 <f>
# CHECK-NEXT: R_RISCV_JAL f
# CHECK-NEXT: R_RISCV_RELAX *ABS*
# CHECK-NEXT: jal ra, 0x10008 <f>
# CHECK-NEXT: R_RISCV_JAL f
# CHECK-NEXT: R_RISCV_RELAX *ABS*
# CHECK-EMPTY:
# CHECK-NEXT: <f>:
# CHECK-NEXT: jalr zero, 0x0(ra)
# CHECK-NEXT: R_RISCV_ALIGN *ABS*+0x4
# CHECKR: <_start>:
# CHECKR-NEXT: auipc ra, 0x0
# CHECKR-NEXT: R_RISCV_CALL_PLT f
# CHECKR-NEXT: R_RISCV_RELAX *ABS*
# CHECKR-NEXT: jalr ra, 0x0(ra)
# CHECKR-NEXT: auipc ra, 0x0
# CHECKR-NEXT: R_RISCV_CALL_PLT f
# CHECKR-NEXT: R_RISCV_RELAX *ABS*
# CHECKR-NEXT: jalr ra, 0x0(ra)
# CHECKR-NEXT: addi zero, zero, 0x0
# CHECKR-NEXT: R_RISCV_ALIGN *ABS*+0x4
# CHECKR-EMPTY:
# CHECKR-NEXT: <f>:
# CHECKR-NEXT: jalr zero, 0x0(ra)
# CHECKNORELAX: <_start>:
# CHECKNORELAX-NEXT: auipc ra, 0x0
# CHECKNORELAX-NEXT: R_RISCV_CALL_PLT f
# CHECKNORELAX-NEXT: R_RISCV_RELAX *ABS*
# CHECKNORELAX-NEXT: jalr ra, 0x10(ra)
# CHECKNORELAX-NEXT: auipc ra, 0x0
# CHECKNORELAX-NEXT: R_RISCV_CALL_PLT f
# CHECKNORELAX-NEXT: R_RISCV_RELAX *ABS*
# CHECKNORELAX-NEXT: jalr ra, 0x8(ra)
# CHECKNORELAX-EMPTY:
# CHECKNORELAX-NEXT: <f>:
# CHECKNORELAX-NEXT: jalr zero, 0x0(ra)
# CHECKNORELAX-NEXT: R_RISCV_ALIGN *ABS*+0x4
.global _start
_start:
call f
call f
.balign 8
f:
ret