Similar to vector ops, XeGPU ops need to be unrolled into smaller shapes such that they can be dispatched into a hardware instruction. This PR marks the initial phase of a series dedicated to incorporating unroll patterns for XeGPU operations. In this installment, we introduce patterns for the following operations: 1. createNd 2. updateNd 3. prefetchNd 4. loadNd 5. storeNd 6. dpas
Multi-Level Intermediate Representation
See https://mlir.llvm.org/ for more information.