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Durgadoss R 1b01064faa
[NVPTX] Add TMA bulk tensor copy intrinsics (#96083) 
This patch adds NVVM intrinsics and NVPTX codegen for:
* cp.async.bulk.tensor.S2G.1D -> 5D variants, supporting both Tile and
   Im2Col modes. These intrinsics optionally support cache_hints as
   indicated by the boolean flag argument.
* cp.async.bulk.tensor.G2S.1D -> 5D variants, with support for both Tile
  and Im2Col modes. The Im2Col variants have an extra set of offsets as
  parameters. These intrinsics optionally support multicast and cache_hints,
  as indicated by the boolean arguments at the end of the intrinsics.
* The backend looks through these flag arguments and lowers to the
   appropriate PTX instruction.
* Lit tests are added for all combinations of these intrinsics in
  cp-async-bulk-tensor-g2s/s2g.ll.
* The generated PTX is verified with a 12.3 ptxas executable.
* Added docs for these intrinsics in NVPTXUsage.rst file.
* PTX Spec reference:
  https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cp-async-bulk-tensor

Signed-off-by: Durgadoss R <durgadossr@nvidia.com>
2024-11-07 15:21:53 +05:30
..
access-non-generic.ll
[NVPTX] Add lowering for bitcasts float<->v4i8 (#69960)
2023-10-23 13:54:39 -07:00
activemask.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
add-sub-128bit.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
addr-mode.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
addrspacecast-gvar.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
addrspacecast.ll
[SDISel] Teach the type legalizer about ADDRSPACECAST (#90969)
2024-05-07 11:08:33 +02:00
aggr-param.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
aggregate-return.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
alias-errors.ll
[NVPTX] Add initial support for '.alias' in PTX
2023-07-21 16:43:46 -05:00
alias.ll
[NVPTX] Add support for calling aliases (#81170)
2024-02-08 17:14:13 -06:00
annotations.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
anonymous-fn-param.ll
…
APIntLoadStore.ll
…
APIntParam.ll
…
APIntSextParam.ll
…
APIntZextParam.ll
…
arg-lowering.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
arithmetic-fp-sm20.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
arithmetic-int.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
async-copy.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
atomic-lower-local.ll
…
atomicrmw-expand.ll
Set MaxAtomicSizeInBitsSupported for remaining targets. (#75703)
2024-01-08 22:34:28 -05:00
atomics-sm60.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
atomics-sm70.ll
Reapply "AtomicExpand: Allow incrementally legalizing atomicrmw" (#107307)
2024-09-06 18:37:34 +04:00
atomics-sm90.ll
Reapply "AtomicExpand: Allow incrementally legalizing atomicrmw" (#107307)
2024-09-06 18:37:34 +04:00
atomics-with-scope.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
atomics.ll
Reland "[NVPTX] Add support for atomic add for f16 type" (#85197)
2024-03-15 08:13:59 +01:00
b52037.ll
[Tests] Drop inrange attribute from some tests (NFC)
2024-03-13 11:49:16 +01:00
barrier.ll
…
bf16-instructions.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
bf16.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
bf16x2-instructions-approx.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
bf16x2-instructions.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
bfe.ll
Fix shr/and pair replace with bfe
2023-07-11 14:43:35 +01:00
boolean-patterns.ll
[NVPTX] improve Boolean ISel (#80166)
2024-01-31 14:37:27 -08:00
branch-fold.ll
…
branch-fold.mir
…
brkpt.ll
[LLVM][NVPTX] Add support for brkpt instruction (#104470)
2024-08-17 10:00:24 +05:30
bswap.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
bug17709.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
bug21465.ll
…
bug22246.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
bug22322.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
bug26185-2.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
bug26185.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
bug41651.ll
…
bug52623.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
bypass-div.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
call_bitcast_byval.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
call-with-alloca-buffer.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
callchain.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
calling-conv.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
calls-with-phi.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
chain-different-as.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
cluster-dim.ll
[NVPTX] Support !"cluster_dim_{x,y,z}" metadata (#109548)
2024-09-25 16:49:02 -07:00
cmpxchg.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
combine-mad.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
combine-min-max.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
common-linkage.ll
Reland "[NVPTX] Use .common linkage for common globals" (#86824)
2024-03-29 11:58:41 -07:00
compare-int.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
compute-ptx-value-vts.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
constant-vectors.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
convergent-mir-call.ll
…
convert-call-to-indirect.ll
[NVPTX] Verify ptx in the right version
2024-09-17 10:40:21 +02:00
convert-fp.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
convert-int-sm20.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
convert-sm80.ll
adding bf16 support to NVPTX
2023-06-28 11:57:13 -07:00
convert-sm89.ll
[NVPTX] Add conversion intrinsics from/to fp8 types (e4m3, e5m2) (#102969)
2024-08-19 10:34:22 -07:00
copysign.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
cp-async-bulk-tensor-g2s.ll
[NVPTX] Add TMA bulk tensor copy intrinsics (#96083)
2024-11-07 15:21:53 +05:30
cp-async-bulk-tensor-s2g.ll
[NVPTX] Add TMA bulk tensor copy intrinsics (#96083)
2024-11-07 15:21:53 +05:30
ctlz.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
ctpop.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
cttz.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
dag-cse.ll
[NVPTX] Make i16x2 a native type and add supported vec instructions (#65799)
2023-09-08 13:44:58 -07:00
demote-vars.ll
[NVPTX] Apply global var demotion to private symbols
2023-08-09 14:41:01 +02:00
disable-opt.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
div-ri.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
divrem-combine.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
dot-product.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
dynamic_stackalloc.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
dynamic-stackalloc-regression.ll
[NVPTX] Emit NVPTXISD::DYNAMIC_STACKALLOC's chain (#101714)
2024-08-05 10:53:33 -07:00
elect.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
empty-type.ll
…
envreg.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
extloadv.ll
…
extractelement.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
f16-ex2.ll
…
f16-instructions.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
f16x2-instructions.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
fast-math.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
fcos-no-fast-math.ll
…
fence-proxy-tensormap.ll
[LLVM][NVPTX] Add NVPTX codegen support for fence.proxy.tensormap (#100748)
2024-08-07 20:25:45 +05:30
fence-sm-90.ll
[NVPTX] Load/Store/Fence syncscope support (#106101)
2024-09-23 10:18:00 -07:00
fence.ll
[NVPTX] Load/Store/Fence syncscope support (#106101)
2024-09-23 10:18:00 -07:00
filetype-null.ll
…
flo.ll
[NVPTX] Add support for nvvm.flo.[us] intrinsics (#114489)
2024-11-01 16:35:43 -07:00
fma-assoc.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
fma-disable.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
fma.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
fminimum-fmaximum.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
fns.ll
…
fp16.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
fp-contract.ll
…
fp-literals.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
fsin-no-fast-math.ll
…
function-align.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
funnel-shift-clamp.ll
[NVPTX] Add support for clamped funnel shift intrinsics (#113228)
2024-10-22 16:39:44 -07:00
generic-to-nvvm-ir.ll
…
generic-to-nvvm.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
global-addrspace.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
global-ctor-empty.ll
…
global-ctor.ll
…
global-dtor.ll
…
global-incomplete-init.ll
[NVPTX] use incomplete aggregate initializers (#79062)
2024-01-24 09:24:28 -08:00
global-ordering.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
global-variable-big.ll
[test] Fix check prefixes
2024-05-13 14:01:00 -07:00
global-visibility.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
globals_init.ll
[NVPTX] use incomplete aggregate initializers (#79062)
2024-01-24 09:24:28 -08:00
globals_lowering.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
gvar-init.ll
…
half.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
i1-array-global.ll
Fix i1 array global crash in NVPTXAsmPrinter. (#92506)
2024-05-17 12:06:35 +02:00
i1-ext-load.ll
[NVPTX] fix emission for i1 load and extload (#99392)
2024-07-18 10:29:24 -07:00
i1-global.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
i1-int-to-fp.ll
[NVPTX] Fix ISel patterns for i1 sint_to_fp (#110866)
2024-10-08 17:48:25 +01:00
i1-load-lower.ll
[NVPTX] fix emission for i1 load and extload (#99392)
2024-07-18 10:29:24 -07:00
i1-param.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
i8-param.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
i8x2-instructions.ll
[NVPTX] Don't use stack memory when bitcasting to/from v2i8 (#113928)
2024-11-01 08:02:43 -07:00
i8x4-instructions.ll
Revert "[NVPTX] Emit prmt selection value in hex" (#115204)
2024-11-06 12:10:49 -08:00
i16x2-instructions.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
i128-global.ll
[NVPTX] use incomplete aggregate initializers (#79062)
2024-01-24 09:24:28 -08:00
i128-param.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
i128-retval.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
i128-struct.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
i128.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
idioms.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
imad.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
indirect_byval.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
inline-asm-b128-test1.ll
[NVPTX] Update 32-bit NVPTX tests to use 64-bit
2024-07-10 16:01:12 -05:00
inline-asm-b128-test2.ll
[NVPTX] Update 32-bit NVPTX tests to use 64-bit
2024-07-10 16:01:12 -05:00
inline-asm-b128-test3.ll
[NVPTX] Update 32-bit NVPTX tests to use 64-bit
2024-07-10 16:01:12 -05:00
inline-asm.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
inlineasm-output-template.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
intr-range.ll
[NVPTX] Revamp NVVMIntrRange pass (#94422)
2024-06-06 06:42:46 -07:00
intrinsic-old.ll
[NVPTX] Revamp NVVMIntrRange pass (#94422)
2024-06-06 06:42:46 -07:00
intrinsics-sm90.ll
[LLVM][NVPTX] Add cp.async.bulk.commit/wait intrinsics (#78698)
2024-01-19 10:42:33 -08:00
intrinsics.ll
[LLVM] Add __builtin_readsteadycounter intrinsic and builtin for realtime clocks (#81331)
2024-02-13 10:06:25 -06:00
isspacep.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
jump-table.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
ld-addrspace.ll
[CodeGen] Convert tests to opaque pointers (NFC)
2024-02-05 14:07:09 +01:00
ld-generic.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
ld-st-addrrspace.py
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
ldg-invariant.ll
Coalesce 16-bit FP types to use integer register classes.
2023-06-05 12:21:52 -07:00
ldparam-v4.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
ldu-i8.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
ldu-ldg.ll
[CodeGen] Convert tests to opaque pointers (NFC)
2024-02-05 14:07:09 +01:00
ldu-reg-plus-offset.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
lit.local.cfg
[NFC][Py Reformat] Reformat lit.local.cfg python files in llvm
2023-05-17 17:03:15 +02:00
load-sext-i1.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
load-store-sm-70.ll
[NVPTX] Load/Store/Fence syncscope support (#106101)
2024-09-23 10:18:00 -07:00
load-store-sm-90.ll
[NVPTX] Load/Store/Fence syncscope support (#106101)
2024-09-23 10:18:00 -07:00
load-store.ll
CodeGen/NVPTX: regen a test, fixing build (#114779)
2024-11-04 13:06:27 +00:00
load-with-non-coherent-cache.ll
[NVPTX] Improve lowering of v4i8 (#67866)
2023-10-09 12:33:22 -07:00
LoadStoreVectorizer.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
local-stack-frame.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
loop-vectorize.ll
…
lower-aggr-copies.ll
[LowerMemIntrinsics] Lower llvm.memmove to wide memory accesses (#100122)
2024-07-26 08:43:30 +02:00
lower-alloca.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
lower-args-gridconstant.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
lower-args.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
lower-byval-args.ll
[NVPTX] add an optional early copy of byval arguments (#113384)
2024-10-24 12:00:56 -07:00
lower-ctor-dtor.ll
[NVPTX] Allow the ctor/dtor lowering pass to emit kernels (#71549)
2023-11-10 09:33:29 -06:00
lower-kernel-ptr-arg.ll
…
machine-sink.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
MachineSink-call.ll
…
MachineSink-convergent.ll
…
managed.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
match.ll
…
math-intrins-sm53-ptx42.ll
…
math-intrins-sm80-ptx70-autoupgrade.ll
[NVPTX][NFC] Update tests to use bfloat type (#101493)
2024-08-09 13:59:56 -07:00
math-intrins-sm80-ptx70-instcombine.ll
…
math-intrins-sm80-ptx70.ll
adding bf16 support to NVPTX
2023-06-28 11:57:13 -07:00
math-intrins-sm86-ptx72-autoupgrade.ll
[NVPTX][NFC] Update tests to use bfloat type (#101493)
2024-08-09 13:59:56 -07:00
math-intrins-sm86-ptx72.ll
adding bf16 support to NVPTX
2023-06-28 11:57:13 -07:00
math-intrins.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
max-align.ll
[NVPTX] cap param alignment at 128 (max supported by ptx) (#96117)
2024-06-25 10:04:45 -07:00
maxclusterrank.ll
Reland [NVPTX] Add support for maxclusterrank in launch_bounds (#66496) (#67667)
2023-09-29 08:39:31 +02:00
mbarrier.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
minmax-negative.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
misaligned-vector-ldst.ll
…
mma-no-sink-after-laneid-check.ll
[NVPTX] Make nvptx mma instructions convergent. (#96521)
2024-06-24 22:15:58 -04:00
module-inline-asm.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
mulhi-intrins.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
mulwide.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
naked-fn-with-frame-pointer.ll
[llvm] Consistently respect naked fn attribute in TargetFrameLowering::hasFP() (#106014)
2024-10-18 09:35:42 +04:00
named-barriers.ll
[NVPTX] Add lowering for bitcasts float<->v4i8 (#69960)
2023-10-23 13:54:39 -07:00
nanosleep.ll
[NVPTX] pass correct GPU arch to ptxas test (#81535)
2024-02-12 13:18:08 -08:00
no-extra-parens.ll
…
noduplicate-syncthreads.ll
…
nofunc.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
noreturn.ll
[CodeGen] Convert tests to opaque pointers (NFC)
2024-02-05 14:07:09 +01:00
nounroll.ll
…
nvcl-param-align.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
nvptx-aa.ll
[NVPTX][AA] Traverse use-def chain to find non-generic addrspace (#106477)
2024-08-29 21:26:58 -07:00
nvvm-annotations-D120129.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
nvvm-reflect-arch-O0.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
nvvm-reflect-arch.ll
[NVVMReflect][Reland] Force dead branch elimination in NVVMReflect (#81189)
2024-02-08 20:09:44 -06:00
nvvm-reflect-module-flag.ll
…
nvvm-reflect-ocl.ll
[CodeGen] Convert tests to opaque pointers (NFC)
2024-02-05 14:07:09 +01:00
nvvm-reflect-opaque.ll
[NVPTX] Add clang builtin for __nvvm_reflect intrinsic (#81277)
2024-02-09 14:11:01 -06:00
nvvm-reflect.ll
[NVPTX] Add clang builtin for __nvvm_reflect intrinsic (#81277)
2024-02-09 14:11:01 -06:00
packed-aggr.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
param-align.ll
[NVPTX] Don't use underlying alignment to align param (#96793)
2024-06-27 10:19:05 +01:00
param-load-store.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
param-overalign.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
param-vectorize-device.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
param-vectorize-kernel.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
pass-name.ll
…
pow2_mask_cmp.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
pr13291-i1-store.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
pr16278.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
pr17529.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
proxy-reg-erasure-ptx.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
proxy-reg-erasure.mir
[llvm][NVPTX] Fix RAUW bug in NVPTXProxyRegErasure (#105871)
2024-08-24 13:19:44 -04:00
rcp-opt.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
read-global-variable-constant.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
redux-sync.ll
…
refl1.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
reg-copy.ll
…
reg-types.ll
[NVPTX] Add lowering for bitcasts float<->v4i8 (#69960)
2023-10-23 13:54:39 -07:00
rotate_64.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
rotate.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
rsqrt-opt.ll
[NVPTX] Improve support for rsqrt.approx (#89417)
2024-04-23 08:56:39 -07:00
rsqrt.ll
[NVPTX] Improve support for rsqrt.approx (#89417)
2024-04-23 08:56:39 -07:00
sad-intrins.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
sched1.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
sched2.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
setmaxnreg.ll
[LLVM][NVPTX]: Add intrinsic for setmaxnreg (#77289)
2024-01-09 12:04:13 -08:00
sext-in-reg.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
sext-params.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
sext-setcc.ll
Revert "[NVPTX] Emit prmt selection value in hex" (#115204)
2024-11-06 12:10:49 -08:00
shfl-p.ll
…
shfl-sync-p.ll
…
shfl-sync.ll
…
shfl.ll
…
shift-parts.ll
[NVPTX] Add lowering for bitcasts float<->v4i8 (#69960)
2023-10-23 13:54:39 -07:00
short-ptr.ll
[CodeGen] Convert tests to opaque pointers (NFC)
2024-02-05 14:07:09 +01:00
shuffle-vec-undef-init.ll
Revert "[NVPTX] Emit prmt selection value in hex" (#115204)
2024-11-06 12:10:49 -08:00
simple-call.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
sm-version.ll
[NVPTX] Add a test to verify the .version with sm_90(a)
2023-10-24 18:01:48 +02:00
speculative-execution-divergent-target.ll
[SpeculativeExecution] Add only-if-divergent-target pass option
2023-11-07 11:49:37 +01:00
sqrt-approx.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
st-addrspace.ll
[CodeGen] Convert tests to opaque pointers (NFC)
2024-02-05 14:07:09 +01:00
st-generic.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
st-param-imm.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
stacksaverestore.ll
[NVPTX] Add support for stacksave, stackrestore intrinsics (#114484)
2024-11-01 13:26:28 -07:00
store-retval.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
store-undef.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
surf-read-cuda.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
surf-read.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
surf-tex.py
[NVPTX] Add tex.grad.cube{array} intrinsics (#77693)
2024-01-17 10:41:11 -08:00
surf-write-cuda.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
surf-write.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
symbol-naming.ll
[NVPTX] improve identifier renaming for PTX (#79459)
2024-01-26 13:49:00 -08:00
TailDuplication-convergent.ll
…
tex-read-cuda.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
tex-read.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
texsurf-queries.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
tid-range.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
unaligned-param-load-store.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
unfold-masked-merge-vector-variablemask.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
unreachable.ll
[NVPTX] Only run LowerUnreachable when necessary (#109868)
2024-10-10 12:57:43 -07:00
vaargs.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
variadics-backend.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
variadics-lowering.ll
[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)
2024-11-06 11:53:33 +00:00
vec8.ll
[NVPTX] Improve lowering of v4i8 (#67866)
2023-10-09 12:33:22 -07:00
vec-param-load.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
vector-args.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
vector-call.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
vector-compare.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
vector-global.ll
…
vector-loads.ll
[NVPTX] Emit ld.v4.b16 for loading <4 x bfloat> (#109069)
2024-09-17 21:06:46 -07:00
vector-returns.ll
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
2024-10-19 10:05:36 -04:00
vector-select.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
vector-stores.ll
Revert "[NVPTX] Lower 16xi8 and 8xi8 stores efficiently (#73646)" (#74518)
2023-12-06 10:48:43 -08:00
vectorize-misaligned.ll
…
vote.ll
…
weak-global.ll
Reland "[NVPTX] Use .common linkage for common globals" (#86824)
2024-03-29 11:58:41 -07:00
weak-linkage.ll
[NVPTX] Adapt tests to make them usable with CUDA-12.x
2023-06-06 14:22:12 -07:00
wmma-ptx60-sm70.py
[NVPTX] split long-running wmma.py test into smaller chunks. (#72331)
2023-11-15 09:55:47 -08:00
wmma-ptx61-sm70.py
[NVPTX] split long-running wmma.py test into smaller chunks. (#72331)
2023-11-15 09:55:47 -08:00
wmma-ptx63-sm72.py
[NVPTX] split long-running wmma.py test into smaller chunks. (#72331)
2023-11-15 09:55:47 -08:00
wmma-ptx63-sm75.py
[NVPTX] split long-running wmma.py test into smaller chunks. (#72331)
2023-11-15 09:55:47 -08:00
wmma-ptx64-sm70.py
[NVPTX] split long-running wmma.py test into smaller chunks. (#72331)
2023-11-15 09:55:47 -08:00
wmma-ptx65-sm75.py
[NVPTX] split long-running wmma.py test into smaller chunks. (#72331)
2023-11-15 09:55:47 -08:00
wmma-ptx71-sm80.py
[NVPTX] split long-running wmma.py test into smaller chunks. (#72331)
2023-11-15 09:55:47 -08:00
wmma.py
[NVPTX] split long-running wmma.py test into smaller chunks. (#72331)
2023-11-15 09:55:47 -08:00
zeroext-32bit.ll
[test] Convert text files from CRLF to LF
2024-05-03 10:09:52 -07:00